NULL-checking a struct clk it not only wrong but also not required as
for PXAv3 driver the corresponding clock is mandatory. Remove the
checks from sdhci_pxav3_runtime_{suspend,resume}.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
clk_enable from struct sdhci_pxa is unused, remove it from the private
driver data.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
struct sdhci_pxa is only used in sdhci_pxa driver itself, so move it
there.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
commit bb8175a8aa
("mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMC")
added MMC_DDR52 as eMMC's DDR mode to be distinguished from SD-UHS.
While the differentation may be useful, pxav3 SDHCI controller lacks
a corresponding check in its custom .set_uhs_signaling callback for
MMC_DDR52. This patch adds a new switch case for MMC_TIMING_MMC_DDR52
to MMC_TIMING_UHS_DDR50 case.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
struct sdhci_pxa is private data of PXA SDHCI driver, but not used in
sdhci-pxav2 at all. Drop unused references to struct sdhci_pxa.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
While starting the bkops the previously prepared request should be canceled
and restarted after the bkops. As the prepared resource might already
setup the dma channels and ready to be started. Now with the arrival of bkops
request this prepared request can be serviced ONLY after the bkops. So
holding on to the prepared request in the host driver is confusing at
this point in time, so it makes sense to cleanup such dangling requests and
reissue this request once bkops is done.
Canceling the prepared request would give opportunity to the host drivers
to perform cleanup on the prepared request.
Without this patch host drivers like mmci gets confused when a blocking
request like send_ext_csd(CMD8) is issued while there is already a prepared
request. With the help of this patch, the driver can better manage such
blocking requests and cleanup the prepared requests which are not started yet.
Without this patch I hit below crash on Qualcomm APQ8064 based IFC6410 board
with mmci host driver.
mmci-pl18x 12400000.sdcc: error during DMA transfer!
Unable to handle kernel paging request at virtual address 40000000
pgd = c0204000
[40000000] *pgd=00000000
Internal error: Oops: 805 [#1] SMP ARM
Modules linked in: ipv6 ath6kl_sdio ath6kl_core
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.17.0-rc7-linaro-multi-v7 #1
task: c0c9d7e0 ti: c0c92000 task.ti: c0c92000
PC is at v7_dma_inv_range+0x34/0x4c
LR is at __dma_page_dev_to_cpu+0x80/0x100
pc : [<c021efc0>] lr : [<c021af18>] psr: 400f0193
sp : c0c93e20 ip : c0c9a478 fp : c08ea538
r10: c0c9f548 r9 : 00000002 r8 : e97d9000
r7 : 00000200 r6 : c0c9d504 r5 : c0db0880 r4 : 00000000
r3 : 0000003f r2 : 00000040 r1 : 40000200 r0 : 40000000
Flags: nZcv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c5787d Table: a9ef406a DAC: 00000015
Process swapper/0 (pid: 0, stack limit = 0xc0c92250)
Stack: (0xc0c93e20 to 0xc0c94000)
3e20: c021f058 e9a17178 e9a171bc e99dfd6c 00000001 00000001 e995de10 00000002
3e40: 00000000 c021b574 00000000 c04bc4a4 00000000 e9b49ac0 c0ce6e6c e99dfda4
3e60: 00000088 e9810780 c0d8291c c072ea58 00000000 c072d3fc 00000000 c072f534
3e80: 00000000 e9b49ac0 00000100 c0c9a444 00000088 c072f6b4 c072f5d4 e9d40080
3ea0: e98107dc 00000000 00000000 c0280a60 00000000 7d55bf61 e9810780 e98107dc
3ec0: 00000000 f0002000 c0d460e8 c0d460e8 c0c92000 c0280b60 e9810780 c0ce7190
3ee0: 00000000 c028369c c02835f4 00000088 00000088 c0280278 c0c8ec70 c020f080
3f00: f000200c c0c9a958 c0c93f28 c02088e4 c04bd630 c04bd5bc 200f0013 ffffffff
3f20: c0c93f5c c0212800 00000001 a987c000 c0c93f3c c04bd574 00000000 0000015b
3f40: ea7a0e40 00000000 c0d460e8 c0d460e8 c0c92000 c08ea538 29b12000 c0c93f70
3f60: c04bd630 c04bd5bc 200f0013 ffffffff c04bd574 c071bd24 7d50c9b4 c0719a44
3f80: 7d50c9b4 0000015b c0c9a498 c0c92028 c0c9a498 c0c9a4fc ea7a0e40 c0c8ee38
3fa0: c0d460e8 c0276198 00000000 c0d8291a 00000000 c0c9a400 00000000 c0be0bc4
3fc0: ffffffff ffffffff c0be05f8 00000000 00000000 c0c533d8 c0d82ed4 c0c9a47c
3fe0: c0c533d4 c0c9e870 8020406a 511f06f0 00000000 80208074 00000000 00000000
[<c021efc0>] (v7_dma_inv_range) from [<c021af18>] (__dma_page_dev_to_cpu+0x80/0x100)
[<c021af18>] (__dma_page_dev_to_cpu) from [<c021b574>] (arm_dma_unmap_sg+0x5c/0x84)
[<c021b574>] (arm_dma_unmap_sg) from [<c072ea58>] (mmci_dma_unmap.isra.16+0x60/0x74)
[<c072ea58>] (mmci_dma_unmap.isra.16) from [<c072f534>] (mmci_data_irq+0x1fc/0x29c)
[<c072f534>] (mmci_data_irq) from [<c072f6b4>] (mmci_irq+0xe0/0x114)
[<c072f6b4>] (mmci_irq) from [<c0280a60>] (handle_irq_event_percpu+0x78/0x134)
[<c0280a60>] (handle_irq_event_percpu) from [<c0280b60>] (handle_irq_event+0x44/0x64)
[<c0280b60>] (handle_irq_event) from [<c028369c>] (handle_fasteoi_irq+0xa8/0x1a8)
[<c028369c>] (handle_fasteoi_irq) from [<c0280278>] (generic_handle_irq+0x2c/0x3c)
[<c0280278>] (generic_handle_irq) from [<c020f080>] (handle_IRQ+0x40/0x90)
[<c020f080>] (handle_IRQ) from [<c02088e4>] (gic_handle_irq+0x38/0x68)
[<c02088e4>] (gic_handle_irq) from [<c0212800>] (__irq_svc+0x40/0x54)
Exception stack(0xc0c93f28 to 0xc0c93f70)
3f20: 00000001 a987c000 c0c93f3c c04bd574 00000000 0000015b
3f40: ea7a0e40 00000000 c0d460e8 c0d460e8 c0c92000 c08ea538 29b12000 c0c93f70
3f60: c04bd630 c04bd5bc 200f0013 ffffffff
[<c0212800>] (__irq_svc) from [<c04bd5bc>] (msm_cpu_pm_enter_sleep+0x48/0x4c)
[<c04bd5bc>] (msm_cpu_pm_enter_sleep) from [<c071bd24>] (qcom_lpm_enter_spc+0x20/0x2c)
[<c071bd24>] (qcom_lpm_enter_spc) from [<c0719a44>] (cpuidle_enter_state+0x44/0xf0)
[<c0719a44>] (cpuidle_enter_state) from [<c0276198>] (cpu_startup_entry+0x1f4/0x238)
[<c0276198>] (cpu_startup_entry) from [<c0be0bc4>] (start_kernel+0x384/0x390)
Code: 1e070f3e e1110003 e1c11003 1e071f3e (ee070f36)
---[ end trace cf6cb3f6432c9834 ]---
Kernel panic - not syncing: Fatal exception in interrupt
Reported-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
In mmc_init_card function some of the branches in error handling paths
go to "err" label, which skips removing of newly allocated card structure,
that will actually not be used. Fix that by using proper "free_card" label.
Also, some messages in these branches are reported as warnings,
although the operation processing is not continued. Change these
messages to error level.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The debug messages with commands execution results, that are printed
after processing the request, do not include results of sbc (set block count)
part of request. Add the debug message for that part too.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Some request fields are initialized just before request processing
for sanity purposes. This is done for command, data, and stop parts
of the request, but not for sbc (set block count) part. Add such
initialization for that part too.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add the case of SET_BLOCK_COUNT command error to the error conditions
check for making a controller reset at request handling finish.
Otherwise, if the SET_BLOCK_COUNT command failed, e.g. with a timeout,
the controller state was not reset, and the next command failed too.
In the case of data error the controller reset is already done in
finish_data() function before sending stop command (if present),
so the finish tasklet should make a reset after data error only
if no stop command existed in the request.
Also, fix the indentation of this condition check to make it more logical.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
As a follow-up of commit
"mmc: sdhci: Balance vmmc regulator_enable(), and always enable vqmmc"
vmmc regulator disable is also not needed in sdhci_remove_host.
The regulator is completely controlled by mmc_power_up and mmc_power_off
functions and is already disabled by the time of removing the host.
Extra regulator_disable call in sdhci_remove_host is unbalanced and
causes a warning reported by regulator core, so should be removed.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The commit ad93220de7 ("mmc: sdhci-esdhc-imx: change pinctrl state
according to uhs mode") exits the probe in case there are no valid
pinctrl states found.
As there are configurations doing the pin mux properly in the boot
loader, don't exit. Just warn, but go on in case if there are no
pinctrl states in the device tree.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
If available voltages are not given, mmc_regulator_get_supply() function
returns 0 and mxcmmc driver doesn't set a value for ocr_avail mask.
In accordance with the comment in platform_data/mmc-mxcmmc.h,
fix it, assuming MMC_VDD_32_33 | MMC_VDD_33_34 as default value.
Signed-off-by: Matteo Facchinetti <matteo.facchinetti@sirius-es.it>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
During a read of data block using dma, driver might have two ways to finish to read
and free the resources:
1) checking STATUS_DATA_TRANS_DONE mask, in the mxcmci_irq() routine
(pending to mmc irq)
2) mxmmc driver, registers also a mxcmci_dma_callback() and when transfer is finished,
dma driver calls this callback. (pending to dma irq)
Both ways are concurrent with each other.
Race condition happens when following events occur:
/* (1) mxcmci driver start data transfer */
158.418970: mpc_dma_execute: mpc_dma_execute(): will_access_peripheral start cid=31
158.418976: mpc_dma_issue_pending <-mxcmci_request
158.418983: mxcmci_start_cmd <-mxcmci_request
/* (2) mxcmci driver receive mmc irq */
158.419656: mxcmci_irq <-handle_irq_event_percpu
158.419692: mxcmci_read_response <-mxcmci_irq
/* (3) mxcmci driver checks that transfer is complete and call mxcmci_finish_data() */
158.419726: mxcmci_data_done <-mxcmci_irq
158.419729: mxcmci_finish_data <-mxcmci_data_done
158.419733: dma_direct_unmap_sg <-mxcmci_finish_data
158.419736: mxcmci_swap_buffers.isra.24 <-mxcmci_finish_data
158.419762: mxcmci_read_response <-mxcmci_data_done
/* (4) mxcmci driver (no dma): send stop command */
158.419765: mxcmci_start_cmd <-mxcmci_data_done
/* (5) mxcmci driver (no dma): receive the stop command irq response */
158.419782: mxcmci_irq <-handle_irq_event_percpu
158.419812: mxcmci_read_response <-mxcmci_irq
158.419843: mxcmci_finish_request <-mxcmci_irq
/* (6) dma driver: receive dma irq (finish data transfer) related by request on step 1 */
158.419853: mpc_dma_irq <-handle_irq_event_percpu
158.420001: mpc_dma_irq_process <-mpc_dma_irq
158.420004: mpc_dma_irq_process <-mpc_dma_irq
/* (7) dma driver: start dma tasklet to finish the dma irq handling */
158.420008: mpc_dma_irq_process: mpc_dma_irq_process(): completed ch:31
/* (8) mxcmci driver: start next data transfer using dma */
158.420174: mxcmci_request <-mmc_start_req
158.420182: dma_direct_map_sg <-mxcmci_request
158.420192: mpc_dma_prep_slave_sg <-mxcmci_request
/* (9) dma driver: schedule irq tasklet and execute mxcmci dma driver callback */
158.420250: mpc_dma_tasklet <-tasklet_action
158.420254: mpc_dma_process_completed <-tasklet_action
158.420267: mxcmci_dma_callback <-mpc_dma_process_completed
/* ERROR!!! (10) mxcmci driver callback works on dma data related to the step 1
that is already finished */
158.420271: mxcmci_data_done <-mpc_dma_process_completed
158.420273: mxcmci_finish_data <-mxcmci_data_done
/* ERROR!!! (11) mxcmci driver: clear data that should be used by step 8 and
send an other mmc stop command (already sended on step 4) */
158.420276: dma_direct_unmap_sg <-mxcmci_finish_data
158.420279: mxcmci_swap_buffers.isra.24 <-mxcmci_finish_data
158.420330: mxcmci_read_response <-mxcmci_data_done
158.420333: mxcmci_start_cmd <-mxcmci_data_done
158.420338: dma_run_dependencies <-mpc_dma_process_completed
...
...
...
168.474223: mxcmci_watchdog <-call_timer_fn
168.474236: mxcmci_watchdog: mxcmci_watchdog
168.474397: mpc_dma_device_control <-mxcmci_watchdog
In accordance with the other drivers that using the dma engine,
fix it, leaving *only* to dma driver the complete control to
ending the read operation.
Removing STATUS_READ_OP_DONE event activation, has as effect
to force mxcmci driver to handle the finish data transfer only
by mxcmci dma callback.
Signed-off-by: Matteo Facchinetti <matteo.facchinetti@sirius-es.it>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Since commit 89168b4899 ("mmc: core: restore detect line inversion
semantics"), the SD card on i.MX28 (and possibly other) devices isn't
detected and booting stops at:
[ 4.120617] Waiting for root device /dev/mmcblk0p3...
This is caused by the MMC_CAP2_CD_ACTIVE_HIGH flag being set incorrectly
when the host controller doesn't use a GPIO for card detection (but
instead uses a dedicated pin). In this case mmc_gpiod_request_cd() will
return before assigning to the gpio_invert variable, leaving the
variable uninitialized. The variable then gets used to set the flag.
This patch fixes the issue by making sure gpio_invert is set to false
when a GPIO isn't used. After this patch, i.MX28 boots fine.
The MMC_CAP2_RO_ACTIVE_HIGH (write protect) flag is also set incorrectly
for the exact same reason (it uses the same uninitialized variable), so
this patch fixes that too.
Fixes: 89168b4899 ("mmc: core: restore detect line inversion semantics")
Reported-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Kristina Martšenko <kristina.martsenko@gmail.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
- Fix SDIO IRQ bug.
- MMC regulator improvements.
- Fix slot-gpio card detect bug.
- Add support for Driver Stage Register.
- Convert the common MMC OF parser to use GPIO descriptors.
- Convert MMC_CAP2_NO_MULTI_READ into a callback, ->multi_io_quirk().
- Some additional minor fixes.
MMC host:
- mmci: Support Qualcomm specific DML layer for DMA.
- dw_mmc: Use common MMC regulators.
- dw_mmc: Add support for Rock-chips RK3288.
- tmio: Enable runtime PM support.
- tmio: Add support for R-Car Gen2 SoCs.
- tmio: Several fixes and improvements.
- omap_hsmmc: Removed Balaji from MAINTAINERS.
- jz4740: add DMA and pre/post support.
- sdhci: Add support for Intel Braswell.
- sdhci: Several fixes and improvements.
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Merge tag 'mmc-v3.18-1' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Fix SDIO IRQ bug
- MMC regulator improvements
- Fix slot-gpio card detect bug
- Add support for Driver Stage Register
- Convert the common MMC OF parser to use GPIO descriptors
- Convert MMC_CAP2_NO_MULTI_READ into a callback, ->multi_io_quirk()
- Some additional minor fixes
MMC host:
- mmci: Support Qualcomm specific DML layer for DMA
- dw_mmc: Use common MMC regulators
- dw_mmc: Add support for Rock-chips RK3288
- tmio: Enable runtime PM support
- tmio: Add support for R-Car Gen2 SoCs
- tmio: Several fixes and improvements
- omap_hsmmc: Removed Balaji from MAINTAINERS
- jz4740: add DMA and pre/post support
- sdhci: Add support for Intel Braswell
- sdhci: Several fixes and improvements"
* tag 'mmc-v3.18-1' of git://git.linaro.org/people/ulf.hansson/mmc: (119 commits)
ARM: dts: fix MMC2 regulators for Exynos5420 Arndale Octa board
mmc: sdhci-acpi: Fix Braswell eMMC timeout clock frequency
mmc: sdhci-acpi: Pass HID and UID to probe_slot
mmc: sdhci-acpi: Get UID directly from acpi_device
mmc, sdhci, bcm-kona, LLVMLinux: Remove use of __initconst
mmc: sdhci-pci: Fix Braswell eMMC timeout clock frequency
mmc: sdhci: Let a driver override timeout clock frequency
mmc: sdhci-pci: Add Bay Trail and Braswell SD card detect
mmc: sdhci-pci: Set SDHCI_QUIRK2_STOP_WITH_TC for Intel BYT host controllers
mmc: sdhci-acpi: Add a HID and UID for a SD Card host controller
mmc: sdhci-acpi: Set SDHCI_QUIRK2_STOP_WITH_TC for Intel host controllers
mmc: sdhci: Add quirk for always getting TC with stop cmd
mmc: core: restore detect line inversion semantics
mmc: Fix incorrect warning when setting 0 Hz via debugfs
mmc: Fix use of wrong device in mmc_gpiod_free_cd()
mmc: atmel-mci: fix mismatched section on atmci_cleanup_slot
mmc: rtsx_pci: Set power related cap2 macros
mmc: core: Add new power_mode MMC_POWER_UNDEFINED
mmc: sdhci: execute tuning when device is not busy
mmc: atmel-mci: Release mmc resources on failure in probe
..
Braswell eMMC host controller specifies an incorrect
timeout clock frequncy in the capabilities registers.
The correct value is 1 MHz. A similar fix was done
for sdhci-pci, however in the sdhci-acpi case the
HID/UID is not unique so the capabilities register
values are matched also.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Pass HID and UID to probe_slot so extra setup
can be done for specific ids.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
UID was made available on acpi_device since
commit ccf7804026 ("ACPI: Add _UID support for ACPI devices.")
Use it from there instead of reprocessing the
ACPI object info.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Clear QUEUE_FLAG_ADD_RANDOM in all block drivers that set
QUEUE_FLAG_NONROT.
Historically, all block devices have automatically made entropy
contributions. But as previously stated in commit e2e1a148 ("block: add
sysfs knob for turning off disk entropy contributions"):
- On SSD disks, the completion times aren't as random as they
are for rotational drives. So it's questionable whether they
should contribute to the random pool in the first place.
- Calling add_disk_randomness() has a lot of overhead.
There are more reliable sources for randomness than non-rotational block
devices. From a security perspective it is better to err on the side of
caution than to allow entropy contributions from unreliable "random"
sources.
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
The __initconst is in the wrong place, and when moved to the correct place
it uncovers an error where the variable is used by non-init data structures.
Instead merely make them const and put the const in the right spot.
Signed-off-by: Behan Webster <behanw@converseincode.com>
Reviewed-by: Mark Charlebois <charlebm@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Braswell eMMC host controller specifies an incorrect
timeout clock frequncy in the capabilities registers.
The correct value is 1 MHz.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Let a driver override the timeout clock frequency by
populating it before calling sdhci_add_host(). Note
the value will otherwise be zero because sdhci_host is
zeroed when allocated.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add support for card detect for Bay Trail
and Braswell SD Card host controllers in PCI
mode.
This uses the gpio descriptor API which can find
gpio descriptors, for example, on an ACPI comapnion
device.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add a HID (INT33BB) and UID (3) for a SD Card host controller.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add a quirk for a host controller that always sets
a Transfer Complete interrupt status for the stop
command even when a busy response is not indicated.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
commit 98e90de99a
"mmc: host: switch OF parser to use gpio descriptors"
switched the semantic behaviour of card detect and read
only flags such that the inversion capability flag would
only be set if inversion was explicitly specified in the
device tree, in the hopes that no-one was using double
inversion.
It turns out that the XOR:ing between the explicit
inversion was indeed in use, so we need to restore the
old semantics where both ways of inversion are checked
and the end result XOR:ed.
Reported-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The commit 46420dd73b (PM / Domains: Add APIs to attach/detach a PM
domain for a device) started using errno values in pm.h header file.
It also failed to include the header for these, thus it caused
compiler errors.
Instead of including the errno header to pm.h, let's move the functions
to pm_domain.h, since it's a better match.
Fixes: 46420dd73b (PM / Domains: Add APIs to attach/detach a PM domain for a device)
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
It is possible to turn off the card clock by setting
the frequency to zero via debugfs e.g.
echo 0 > /sys/kernel/debug/mmc0/clock
However that produces an incorrect warning that is
designed to warn if the frequency is below the minimum
operating frequency. So correct the warning.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
mmc_gpiod_free_cd() is paired with mmc_gpiod_request_cd()
and both must reference the same device which is the
actual host controller device not the mmc_host class
device.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
As of 528bc7808f ("mmc: atmel-mci: Release mmc resources on failure in probe"),
the atmci_probe() function calls atmci_cleanup_slot in the failure path.
This causes a new warning whenever the driver is built:
WARNING: drivers/mmc/host/built-in.o(.init.text+0xa04): Section mismatch in reference from the function atmci_probe() to the function .exit.text:atmci_cleanup_slot()
The function __init atmci_probe() references
a function __exit atmci_cleanup_slot().
Gcc correctly warns about this function getting dropped in the link stage
for the built-in case, which would cause undefined behavior when this error
path is hit. The solution is to simply drop the __exit annotation.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 528bc7808f ("mmc: atmel-mci: Release mmc resources on failure in probe")
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Set MMC_CAP2_NO_PRESCAN_POWERUP and MMC_CAP2_FULL_PWR_CYCLE for
rtsx_pci_sdmmc and rtsx_usb_sdmmc to reflect properties of Realtek
card reader hosts.
Signed-off-by: Roger Tseng <rogerable@realtek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add MMC_POWER_UNDEFINED for power_mode in struct mmc_ios and use it as
the initial value of host->ios.power_mode.
For hosts with MMC_CAP2_NO_PRESCAN_POWERUP, this makes the later
mmc_power_off() do real power-off things instead of NOP, and further
prevents state messed up in cards that was already initialized (eg. by
BIOS of UEFI driver).
Signed-off-by: Roger Tseng <rogerable@realtek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
We find tuning timeout because of the secure erase operation lasts too
long, so don't do tuning when device is busy.
Signed-off-by: Yi Sun <yi.y.sun@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This change takes care of releasing mmc resources on error cases in
probe function which was missing. Also release timer in remove function.
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This change uses managed resource APIs to allocate resources such as,
clk, gpio, io in order to simplify the driver unload or failure cases.
Hence does away with release statements of the same resources in error
labels and remove function.
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Use the much more common pr_warn instead of pr_warning.
Other miscellanea:
o Coalesce formats
o Realign arguments
o Remove extra spaces when coalescing formats
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The same tuning block exists in the dw_mmc h.c and sdhci-msm.c
files. Move these into mmc.c so that they can be shared across
drivers.
Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
If we're tuning on a big-endian CPU we'll never determine we properly
tuned the device because we compare the data we received from the
controller with a table that assumes the CPU is little-endian.
Change the table to be an array of bytes instead of 32-bit words
so we can use memcmp() without needing to byte-swap every word
depending on the endianess of the CPU.
Cc: Asutosh Das <asutoshd@codeaurora.org>
Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
Fixes: 415b5a75da "mmc: sdhci-msm: Add platform_execute_tuning implementation"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
As soon as the CD IRQ is requested, it can trigger, since it's an
externally controlled event. If it does, delayed_work host->detect will
be scheduled.
Many host controller probe()s are roughly structured as:
*_probe() {
host = sdhci_pltfm_init();
mmc_of_parse(host->mmc);
rc = sdhci_add_host(host);
if (rc) {
sdhci_pltfm_free();
return rc;
}
In 3.17, CD IRQs can are enabled quite early via *_probe() ->
mmc_of_parse() -> mmc_gpio_request_cd() -> mmc_gpiod_request_cd_irq().
Note that in linux-next, mmc_of_parse() calls mmc_gpio*d*_request_cd()
rather than mmc_gpio_request_cd(), and mmc_gpio*d*_request_cd() doesn't
call mmc_gpiod_request_cd_irq(). However, this issue still exists if
mmc_gpio_request_cd() is called directly before mmc_start_host().
sdhci_add_host() may fail part way through (e.g. due to deferred
probe for a vmmc regulator), and sdhci_pltfm_free() does nothing to
unrequest the CD IRQ nor cancel the delayed_work. sdhci_pltfm_free() is
coded to assume that if sdhci_add_host() failed, then the delayed_work
cannot (or should not) have been triggered.
This can lead to the following with CONFIG_DEBUG_OBJECTS_* enabled, when
kfree(host) is eventually called inside sdhci_pltfm_free():
WARNING: CPU: 2 PID: 6 at lib/debugobjects.c:263 debug_print_object+0x8c/0xb4()
ODEBUG: free active (active state 0) object type: timer_list hint: delayed_work_timer_fn+0x0/0x18
The object being complained about is host->detect.
There's no need to request the CD IRQ so early; mmc_start_host() already
requests it. For most SDHCI hosts at least, the typical call path that
does this is: *_probe() -> sdhci_add_host() -> mmc_add_host() ->
mmc_start_host(). Therefore, remove the call to mmc_gpiod_request_cd_irq()
from mmc_gpio_request_cd(). This also matches mmc_gpio*d*_request_cd(),
which already doesn't call mmc_gpiod_request_cd_irq().
However, some host controller drivers call mmc_gpio_request_cd() after
mmc_start_host() has already been called, and assume that this will also
call mmc_gpiod_request_cd_irq(). Update those drivers to explicitly call
mmc_gpiod_request_cd_irq() themselves. Ideally, these drivers should be
modified to move their call to mmc_gpio_request_cd() before their call
to mmc_add_host(). However that's too large a change for stable.
This solves the problem (eliminates the kernel error message above),
since it guarantees that the IRQ can't trigger before mmc_start_host()
is called.
The critical point here is that once sdhci_add_host() calls
mmc_add_host() -> mmc_start_host(), sdhci_add_host() is coded not to
fail. In other words, if there's a chance that mmc_start_host() may have
been called, and CD IRQs triggered, and the delayed_work scheduled,
sdhci_add_host() won't fail, and so cleanup is no longer via
sdhci_pltfm_free() (which doesn't free the IRQ or cancel the work queue)
but instead must be via sdhci_remove_host(), which calls mmc_remove_host()
-> mmc_stop_host(), which does free the IRQ and cancel the work queue.
CC: Russell King <linux@arm.linux.org.uk>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexandre Courbot <acourbot@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Previously only the ACPI PM domain was supported by the sdio bus.
Let's convert to the common attach/detach functions for PM domains,
which currently means we are extending the support to include the
generic PM domain as well.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
I spent a couple of days with the driver just hanging due to me forgetting to
specify the external crystal frequency, so that clk_get_rate() returned 0 and
thus the loop in tmio_mmc_set_clock() never ended. I don't think that's an
acceptable behavior, so I suggest that the minimum frequency is checked for 0
in tmio_mmc_host_probe().
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Ian Molton <ian.molton@codethink.co.uk>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Current tmio is using sd_ctrl_read16/write16_rep()
for data transfer.
It works if transfer size was even number,
but, last 1 byte will be ignored if
transfer size was odd number.
This patch adds new tmio_mmc_transfer_data()
and solve this issue.
Tested-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Stop command errors are not fatal to the transfer since we make sure
that the card returns to the transfer state and check the card status.
Change an unnecessary error to an info.
Signed-off-by: Johan Rudholm <johanru@axis.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dw_mci_of_find_slot_node() is only used in dw_mci_of_get_slot_quirks()
if CONFIG_OF is defined, thus there is no need to have a !CONFIG_OF
version of it. Fixes the following compile warning with !CONFIG_OF:
CC [M] drivers/mmc/host/dw_mmc.o
drivers/mmc/host/dw_mmc.c:2223:28: warning: ‘dw_mci_of_find_slot_node’ defined but not used [-Wunused-function]
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Commit 0dcaa2499b improved error
handling of sdhci_add_host. However, "err_of_parse" and "err_cd_req"
should be placed after "pm_runtime_disable(&pdev->dev)".
Signed-off-by: Xiang Wang <wangx@marvell.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch renames sdio flag in vendor data to st_sdio, as this flag is
only used to enable ST specific sdio setup. This will also ensure that
the ST specfic setup is not done on other vendor like Qualcomm.
Originally the issue was detected while testing WLAN ath6kl on IFC6410
board with APQ8064 SOC.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch adds sdio enable mask in variant data, SOCs like ST have
special bits in datactrl register to enable sdio. Unconditionally setting
this bit in this driver breaks other SOCs like Qualcomm which maps this
bits to something else, so making this enable bit to come from variant
data solves the issue.
Originally the issue is detected while testing WLAN ath6kl on Qualcomm
APQ8064.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Currently the MMCI driver will only handle GPIO descriptors
implicitly through the device tree probe glue in mmc_of_init(),
but devices instatiated other ways such as through board files
and passing descriptors using the GPIO descriptor table will
not be able to exploit descriptors.
Augment the driver to look for a GPIO descriptor if device
tree is not used for the device, and if that doesn't work,
fall back to platform data GPIO assignment using the old
API. The end goal is to get rid of the platform data integer
GPIO assingments from the kernel.
This enable the MMCI-embedding platforms to be converted to
GPIO descritor tables.
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This switches the central MMC OF parser to use gpio descriptors
instead of grabbing GPIOs explicitly from the device tree.
This strips out an unecessary use of the integer-based GPIO
API that we want to get rid of, cuts down on code as the
gpio descriptor code will handle active low flags.
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This makes it possible to get the write protect (read only)
GPIO line from a GPIO descriptor. Written to exactly mirror
the card detect function.
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
When the slot GPIO driver gets the GPIO to be used for card
detect, it is now possible to specify a flag to have the line
set up as input. Get rid of the explicit setup call for input
and use the flag.
The extra argument works as there are transition varargs
macros in place in the <linux/gpio/consumer.h> header, in
the future we will make the flags argument compulsory.
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
It seems very unlikely that eMMC devices would hold a standard
partitiontable in one of it's boot areas. Therefore, let's prevent
them from being scanned.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Now, sh_mobile_sdhi can use .multi_io_quirk callback
instead of MMC_CAP2_NO_MULTI_READ flags.
let's use it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Now, tmio_mmc can use .multi_io_quirk callback
instead of MMC_CAP2_NO_MULTI_READ flags.
let's use it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Now, omap_hsmmc can use .multi_io_quirk callback
instead of MMC_CAP2_NO_MULTI_READ flags.
let's use it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Due to HW issue, SDHCI host controller on Intel
Baytrail/Merrifield platforms can not use preset
register. So, disable preset registers for them by quirks.
Signed-off-by: Yunpeng Gao <yunpeng.gao@intel.com>
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Historically, we have been using MMC_CAP* to handle host HW issues and
currently the block layer uses MMC_CAP2_NO_MULTI_READ flag for a multi
I/O HW bug workaround.
There are a few tweaks needed to make MMC_CAP2_NO_MULTI_READ suite all
situations. Therefore let's add an optional host ops callback to enable
host drivers to return the number of blocks it allows per request.
In a future patch and when host drivers have converted to the new
callback, MMC_CAP2_NO_MULTI_READ shall be removed.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Right now enable 1.2v IO voltage for SDHC is by using vqmmc.
Thus for the host which doesn't have vqmmc, or its vqmmc does
not support 1.2v, directly use MMC_CAP2_HS200 may cause HS200
failure.
So needs to check if vqmmc is able to support 1.2v. If it does
not support, disable 1.2v IO for HS200.
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Even (e)MMC card can support 3.3v to 1.2v vccq in DDR, but not all
host controller can support this, like some of the SDHCI host
which connect to an eMMC device. Some of these host controller
still needs to use 1.8v vccq for supporting DDR mode.
So the sequence will be:
if (host and device can both support 1.2v IO)
use 1.2v IO;
else if (host and device can both support 1.8v IO)
use 1.8v IO;
so if host and device can only support 3.3v IO, this is the last choice.
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Yunpeng Gao <yunpeng.gao@intel.com>
Tested-by: Jean-Michel Hautbois <jhautbois@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add the clock prepare and unprepare call to the driver set_ios calls
phase. This will remove a warning once the PXA architecture is migrated
to the clock infrastructure.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Similar to sdhci-pci controller, also add probe_slot
and remove_slot method in the sdhci-acpi driver.
Signed-off-by: Yunpeng Gao <yunpeng.gao@intel.com>
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
It is fully legal for a controller to start handling busy-end interrupt
before it has signaled that the command has completed. So make sure
we do things in the proper order, Or it results that command interrupt
is ignored so it can cause unexpected operations. This is founded at some
toshiba emmc with the bellow warning.
"mmc0: Got command interrupt 0x00000001 even though
no command operation was in progress."
This issue has been also reported by Youssef TRIKI:
It is not specific to Toshiba devices, and happens with eMMC devices
as well as SD card which support Auto-CMD12 rather than CMD23.
Also, similar patch is submitted by:
Gwendal Grignou <gwendal@chromium.org>
Changes since v1:
Fixed conflict with the next of git.linaro.org/people/ulf.hansson/mmc.git
and Tested if issue is fixed again.
Signed-off-by: Hankyung Yu <hankyung.yu@lge.com>
Signed-off-by: Chanho Min <chanho.min@lge.com>
Tested-by: Youssef TRIKI <youssef.triki@st.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
sdhci_disable_irq_wakeups() is exported, but it is not called outside sdhci.c.
Make it static and do not export it, so that the following sparse warning is
fixed:
drivers/mmc/host/sdhci.c:2548:6: warning: symbol 'sdhci_disable_irq_wakeups' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The timeout_clk calculation code for SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK case
is common and could be moved into common sdhci_do_set_ios, then platform code
which is not using sdhci_set_clock does not need to write the same code again.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The timeout_clk calculation code in sdhci_add_host is meaningless for
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK.
So only execute them with no SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK set.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The default sdhci driver write 0xE into timeout counter register to
set the maximum timeout. The value is not correct for uSDHC since the
max counter value for uSDHC is 0xF.
Instead of using common timeout code in sdhci, we implement esdhc_set_timeout
to handle the difference between eSDHC and uSDHC.
Currently we simply set the max timeout value as before.
But in the future, we probably may implement IMX specific timeout
setting algorithm and use suitable timeout for different CMDs.
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Currently the common code assume 0xE is the maximum timeout counter
value and use it to write into the timeout counter register.
However, it's fairly possible that some other SoCs may have different
max timeout register value. That means 0xE may be incorrect and
becomes meaningless.
It's also possible that other platforms has different timeout
calculation algorithm. To be flexible, this patch provides a .set_timeout
hook for those platforms to set the timeout on their way if they need.
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The default sdhci code use the 1 << 27 as the max timeout counter to
to calculate the max_busy_timeout, however it's not correct for uSDHC
since its the max counter is 1 << 28.
Implement esdhc_get_max_timeout_cout to handle it correctly.
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Currently the max timeout count is hardcode to 1 << 27 for calcuate
the max_busy_timeout, however, for some platforms the max timeout
count may not be 1 << 27, e.g. i.MX uSDHC is 1 << 28.
Thus 1 << 27 is not correct for such platform.
It is also possible that other platforms may have different values.
To be flexible, we add a get_max_timeout_count hook to get the correct
maximum timeout value for these platforms.
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
It's possible that mmc_of_parse() could return errors (possibly in
some future version it might return -EPROBE_DEFER even). Let's pass
those errors back.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
the implementation of CSR SDHCI controller is a modified version of
the one described in the 1.0 specification, and not a normal 3.0
controller.
and 8bit-width enable bit of CSR MMC hosts is 3, while stardard hosts
use bit 5.
this patch fixes the functionality of 8bit transfer in mmc controllers
and improve performance for mmc0 a lot.
Signed-off-by: Minda Chen <Minda.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
For UHS cards we need the ability to switch voltages from 3.3V to
1.8V. Add support to the dw_mmc driver to handle this. Note that
dw_mmc needs a little bit of extra code since the interface needs a
special bit programmed to the CMD register while CMD11 is progressing.
This means adding a few extra states to the state machine to track.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch makes use of mmc_regulator_get_supply() to handle
the vmmc and vqmmc regulators.Also it moves the code handling
the these regulators to dw_mci_set_ios().It turned on the vmmc
and vqmmc during MMC_POWER_UP and MMC_POWER_ON,and turned off
during MMC_POWER_OFF.
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Declare ERASE capability so we can use filesystems with the discard
option and the fstrim tool.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The hardware is the same as used in Baytrail. Add these new PCI IDs to the
driver's list of supported IDs.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
To support HS200 and UHS-1, we need add a big hunk of code,
as shown in the following patches. So a separate file for
rockchip SOCs is suitable.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Some controller is supporting actual clock on SD_CLK_CTRL :: DIV[7:0].
Renesas SH-Mobile SDHI doesn't support,
but, Renesas R-Car SDHI supports it.
This patch adds new TMIO_MMC_CLK_ACTUAL flag for it.
[Kuninori Morimoto: tidyuped for upstreaming]
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
TMIO clock is set via tmio_mmc_set_clock() -> tmio_mmc_clk_start(),
and SCLKEN bit will be set on tmio_mmc_clk_start().
It is not needed on tmio_mmc_set_clock() function.
The required clock setting will not be able to set
in some clocks without this patch.
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch adds new TMIO_MMC_HAVE_CTL_DMA_REG flag,
and remove Renesas specific #ifdef from tmio driver
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Some controllers need to check SD bus status when writing data.
Then, it checks ILL_FUNC bit on SD_INFO2 register,
and this method is controlled via TMIO_MMC_HAS_IDLE_WAIT flags.
Same method is required on tmio_mmc_data_irq() which will
be called after writing data.
Current driver is checking CBSY bit for this purpose,
but, some controllers doesn't have CBSY bit.
This patch checks ILL_FUNC bit instead of CBSY bit
if it has TMIO_MMC_HAS_IDLE_WAIT flags
[Kuninori Morimoto: tidyuped for upstreaming]
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Renesas R-Car SDHI should set reserved bits
on CTL_SDIO_STATUS register when writing.
This patch adds new TMIO_MMC_SDIO_STATUS_QUIRK flags
for this purpose
[Kuninori Morimoto: tidyuped for upstreaming
enabled this flags for all SH-Mobile/R-Car]
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Renesas SDHI has "Multiple Block Transfer Mode" settings
on SD_CMD register which controls CMD12 automatically.
This patch cares it, because
CMD12 is not needed when CMD53 (= SD_IO_RW_EXTENDED)
[Kuninori Morimoto: tidyuped for upstreaming
enabled this flags for all SH-Mobile/R-Car]
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Next card access will be always
error if it didn't clear error status
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Basically, SD_BUF0 Tx/Rx addresses are same
in normal TMIO controller,
but, it is different on Renesas R-Car SDHI controller
if it uses DMAC
(Rx address needs to add 0x2000 to Tx address)
This patch adds new .dma_rx_offset and cares it
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
These library functions aren't used and nor needed, let's remove them.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
At system PM suspend, the tmio core accessed the internal registers of
the controller without first moving the device into active state. This
caused a lock-up in system PM suspend phase.
The reason for the register access were masking of IRQs. Since that is
managed via the runtime PM suspend path, let's just re-use that path
for system PM suspend.
In other words force the device into runtime PM suspend state at system
PM suspend and restore it to active state at system PM resume.
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
At system PM suspend, the tmio core accessed the internal registers of
the controller without first moving the device into active state. This
caused a lock-up in system PM suspend phase.
The reason for the register access were masking of IRQs. Since that is
managed via the runtime PM suspend path, let's just re-use that path
for system PM suspend.
In other words force the device into runtime PM suspend state at system
PM suspend and restore it to active state at system PM resume.
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
To take advantage of the clock gating support, use the runtime PM
callbacks provided by the tmio core.
Additionally, we make use of the SET_PM_RUNTIME_PM_OPS, which is a
preparation needed to simplify system PM.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
To be able to simplify system PM, let's re-use the runtime PM callbacks
by converting to the SET_PM_RUNTIME_PM_OPS macro.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
To give the option for tmio hosts to use the runtime PM callbacks for
CONFIG_PM_SLEEP as well as CONFIG_PM_RUNTIME, move them to CONFIG_PM.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
To make sure we don't receive any spurious IRQs while we are inactive,
mask the IRQs from within the ->runtime_suspend() callback.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add clock gating control as a part of the tmio library functions for
runtime PM.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
An internal power state machine were beeing used to keep ->probe() and
->set_ios() in sync. Especially for handling specific scenarios while
using CONFIG_MMC_CLKGATE. Moreover dependency to CONFIG_MMC_CLKGATE
existed to handle runtime PM properly, which we moves away from here.
By removing the state machine and instead make ->set_ios() rely on the
information provided through the function's in-parameters, the code
becomes significantly simplier.
Additonally as a part of this rework we prepares for making the runtime
PM callbacks responsible of clock gating.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Move code for bus_width modification, out of the ->set_ios() callback
and into a separate function, to simplify code.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use runtime PM to keep the host active during I/O operations and other
requests which requires the tmio hardware to be powered.
Additionally make use of the runtime PM autosuspend feature with a
default timeout of 50 ms.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
The host must be kept active to be able to serve SDIO IRQs, thus let's
prevent it from going inactive while SDIO IRQ is enabled.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
The operation conditions register (OCR) stores the voltage
profile of the card, however the list of possible voltages
is restricted by the voltage range supported by the supply
used as VCC/VDD. So in mmc_vddrange_to_ocrmask() a OCR mask
is obtained to filter the not supported voltages, from the
value read in the host controller OCR register.
For fixed regulators, regulator_list_voltage() returns the
fixed output for the first selector but this doesn't happen
for switch (FET) regulators that obtain their voltage from
their parent supply. A call to regulator_get_voltage() is
needed in this case so the regulator core can return the
FET's parent supply voltage output.
This change is consistent with the fact that for other
fixed regulators (that are not FETs) the OCR mask is
returned even when mmc_regulator_set_ocr() checks if the
regulator is fixed before calling regulator_set_voltage().
Without this patch, the following warning is reported when
a FET is used as a vmmc-supply:
dwmmc_exynos 12220000.mmc: Failed getting OCR mask: -22
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Some eMMC and SD cards implement a DSR register that allows to tune
raise/fall times and drive strength of the CMD and DATA outputs.
The values to use depend on the card in use and the host.
It might be needed to reduce the drive strength to prevent voltage peaks
above the host's specification.
Implement a 'dsr' devicetree property that allows to specify the value
to set the DSR to. For non-dt setups the new members of mmc_host can be
set by board code.
This patch was initially authored by Sascha Hauer. It contains
improvements authored by Markus Niebel and Uwe Kleine-König.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
.set_uhs_signaling field is currently initialised twice once to the
arch specific callback pxav3_set_uhs_signaling, and also to the generic
sdhci_set_uhs_signaling callback.
This means that uhs is currently broken for this platform currently, as pxav3
has some special constriants which means it can't use the generic callback.
This happened in
commit 96d7b78cfc ("mmc: sdhci: convert sdhci_set_uhs_signaling() into a library function")
commit a702c8abb2 ("mmc: host: split up sdhci-pxa, create sdhci-pxav3.c")'
Fix this and hopefully prevent it happening in the future by ensuring named
initialisers always follow the declaration order in the structure definition.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Cc: <stable@vger.kernel.org> # v3.16+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This allows us to get rid of the #else condition, as the macro compiles
away to nothing if not enabled.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This allows us to get rid of the #else condition, as the macro compiles
away to nothing if not enabled.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
As the code is using SIMPLE_DEV_PM_OPS helper, this compiles away to
nothing if CONFIG_PM_SLEEP is disabled. Thus we don't need to #define
the suspend/resume callbacks to NULL.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
As the code is using SIMPLE_DEV_PM_OPS helper, this compiles away to
nothing if CONFIG_PM_SLEEP is disabled. Thus we don't need to #define
the suspend/resume callbacks to NULL.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch removes the superflous .owner field for drivers which
use the module_platform_driver API, as this is overriden in
platform_driver_register anyway.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
781e989cf5 ("mmc: sdhci: convert to new SDIO IRQ handling") and
bf3b5ec66b ("mmc: sdio_irq: rework sdio irq handling") disabled
the use of our own custom threaded IRQ handler, but left in an
unconditional wake_up_process() on that handler at resume-time.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=80151
In addition, the check for MMC_CAP_SDIO_IRQ capability is added
before enable sdio IRQ.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
Signed-off-by: Fu Zhonghui <zhonghui.fu@linux.intel.com>
Cc: <stable@vger.kernel.org> # v3.16+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
There are upcoming MIPS SoCs with dw_mmc hosts.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The dw_mmc drivers rely on the DMA API, so update the Kconfig entry
to depend on HAS_DMA. Since the drivers should build on any platform
with DMA, allow the driver to compile tested on non-ARC/ARM platforms.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
when SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK is set, timeout_clk is sdclk.
We need to update it when we change sdclk in sdhci_set_clock.
This allow to have a more precisse timeout and max_busy_timeout. This
can help for command that need a big busy wait (erase, ...).
Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
When we wait for busy after sending a command, if there is
a timeout, we got SDHCI_INT_DATA_TIMEOUT flags.
Before this commit we got the message :
"Got data interrupt 0x00100000 even though no data operation was in progress."
and we need to wait 10s that sdhci_timeout_timer expires.
Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Current code erroneously fill the last byte of R2 response with an undefined
value. In addition, the controller actually 'offloads' the last byte
(CRC7, end bit) while receiving R2 response and thus it's impossible to get the
actual value. This could cause mmc stack to obtain inconsistent CID from the
same card after resume and misidentify it as a different card.
Fix by assigning dummy CRC and end bit: {7'b0, 1} = 0x1 to the last byte of R2.
Cc: <stable@vger.kernel.org> # v3.16+
Fixes: c7f6558d84 ("mmc: Add realtek USB sdmmc host driver")
Signed-off-by: Roger Tseng <rogerable@realtek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Current code erroneously fill the last byte of R2 response with an undefined
value. In addition, the controller actually 'offloads' the last byte
(CRC7, end bit) while receiving R2 response and thus it's impossible to get the
actual value. This could cause mmc stack to obtain inconsistent CID from the
same card after resume and misidentify it as a different card.
Fix by assigning dummy CRC and end bit: {7'b0, 1} = 0x1 to the last byte of R2.
Cc: <stable@vger.kernel.org> # v3.8+
Fixes: ff984e57d3 ("mmc: Add realtek pcie sdmmc host driver")
Signed-off-by: Roger Tseng <rogerable@realtek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
If we happened to get a data error at just the wrong time the dw_mmc
driver could get into a state where it would never complete its
request. That would leave the caller just hanging there.
We fix this two ways and both of the two fixes on their own appear to
fix the problems we've seen:
1. Fix a race in the tasklet where the interrupt setting the data
error happens _just after_ we check for it, then we get a
EVENT_XFER_COMPLETE. We fix this by repeating a bit of code.
2. Fix it so that if we detect that we've got an error in the "data
busy" state and we're not going to do anything else we end the
request and unblock anyone waiting.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@gmail.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
curr should use signed type since it will contain the returned
value which is possible to be a negative value. Using u32 will
make the returned value to be true even there is a negative result.
Change to use int instead of u32
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Make use of the MMC asynchronous request capability to prepare the
next DMA transfer request in parallel with the current transfer.
This is done by adding pre-request and post-request callbacks that are
used by the MMC framework during an active data transfer.
It should help reduce the impact of DMA preparation overhead on the SD
card performance.
Signed-off-by: Apelete Seketeli <apelete@seketeli.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Until now the MMC driver for JZ4740 SoC was relying on PIO mode only
for data transfers.
This patch allows the use of DMA for data trasnfers in addition to PIO
mode by relying on DMA Engine.
DMA tranfers performance might be further improved by taking advantage
of the asynchronous request capability of the MMC framework.
Signed-off-by: Apelete Seketeli <apelete@seketeli.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The code selecting a device for the sdhci host has been
continuously tweaked (4b711cb138
"mmc: sdhci-pltfm: Add structure for host-specific data" and
a4d2177f00 "mmc: sdhci-pltfm: dt
device does not pass parent to sdhci_alloc_host" while there
does not seem to be any reason to use platform device's parent
in the first place.
The comment saying "Some PCI-based MFD need the parent here"
seem to refer to Timberdale FPGA driver (the only MFD driver
registering SDHCI cell, drivers/mfd/timberdale.c) but again,
the only situation when parent device matter is runtime PM,
which is not implemented for Timberdale.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
There is no need for regulator consumers to include special logic for
fixed voltage regulators as they support regulator_set_voltage() just
like their non-fixed regulator counterparts.
Signed-off-by: Tim Kryger <tim.kryger@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
On Qualcomm APQ8064 SOCs, SD card controller has an additional glue
called DML (Data Mover Local/Lite) to assist dma transfers.
This hardware needs to be setup before any dma transfer is requested.
DML itself is not a DMA engine, its just a gule between the SD card
controller and dma controller.
Most of this code has been ported from qualcomm's 3.4 kernel.
This patch adds the code necessary to intialize the hardware and setup
before doing any dma transfers.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Miscellaneous
- Remove DEFINE_PCI_DEVICE_TABLE macro use (Benoit Taine)
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Merge tag 'pci-v3.17-changes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull DEFINE_PCI_DEVICE_TABLE removal from Bjorn Helgaas:
"Part two of the PCI changes for v3.17:
- Remove DEFINE_PCI_DEVICE_TABLE macro use (Benoit Taine)
It's a mechanical change that removes uses of the
DEFINE_PCI_DEVICE_TABLE macro. I waited until later in the merge
window to reduce conflicts, but it's possible you'll still see a few"
* tag 'pci-v3.17-changes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use
- Forward compatibility for eMMC.
- Fix some blacklisted cards with broken secure discard.
MMC host:
- mmci: Add support for Qualcomm variant.
- mmci: Fix regression for arm_variant.
- sdhci: Various fixes and cleanups.
- sdhci: Improve external VDD regulator support.
- sdhci: Support for DDR50 1.8V mode for BayTrail.
- sdhci-st: Add driver for ST SDHCI controller.
- sh-mmcif: DMA fixes.
- omap_hsmmc: Add support for SDIO interrupts.
- sdhci-pci: Add support for Intel Quark X1000.
- dw_mmc: Update the reset sequence.
- s3cmci: port DMA code to dmaengine API.
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Merge tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson:
"Me and Chris Ball decided to try out using my MMC tree as the primary
one, to simplify handling of patches.
This pull does thus contains all the MMC patches for 3.17 rc1, no pull
from Chris this time.
Details:
MMC core:
- forward compatibility for eMMC
- fix some blacklisted cards with broken secure discard
MMC host:
- mmci: Add support for Qualcomm variant
- mmci: Fix regression for arm_variant
- sdhci: Various fixes and cleanups
- sdhci: Improve external VDD regulator support
- sdhci: Support for DDR50 1.8V mode for BayTrail
- sdhci-st: Add driver for ST SDHCI controller
- sh-mmcif: DMA fixes
- omap_hsmmc: Add support for SDIO interrupts
- sdhci-pci: Add support for Intel Quark X1000
- dw_mmc: Update the reset sequence
- s3cmci: port DMA code to dmaengine API"
* tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmc: (67 commits)
mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.
mmc: mmci: Reverse IRQ handling for the arm_variant
mmc: mmci: Move all CMD irq handling to mmci_cmd_irq()
mmc: mmci: Remove redundant check of status for DATA irq
mmc: dw_mmc: change to use recommended reset procedure
mmc: sdhci-pxav3: Use devm_* managed helpers
mmc: tmio: Configure DMA slave bus width
mmc: sh_mmcif: Configure DMA slave bus width
mmc: sh_mmcif: Fix DMA slave address configuration
mmc: sh_mmcif: Document DT bindings
mmc: sdhci-pci: remove PCI PM functions in suspend/resume callback
mmc: Do not advertise secure discard if it is blacklisted
mmc: sdhci-msm: Get COMPILE_TEST support
mmc: sdhci-msm: Remove unnecessary header file inclusion
mmc: sdhci-msm: Fix the binding example
mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller
mmc: sdhci: Preset value not supported in Baytrail eMMC
mmc: MMC_USDHI6ROL0 should depend on HAS_DMA
mmc: MMC_SH_MMCIF should depend on HAS_DMA
...
We should prefer `struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to
meet kernel coding style guidelines. This issue was reported by checkpatch.
A simplified version of the semantic patch that makes this change is as
follows (http://coccinelle.lip6.fr/):
// <smpl>
@@
identifier i;
declarer name DEFINE_PCI_DEVICE_TABLE;
initializer z;
@@
- DEFINE_PCI_DEVICE_TABLE(i)
+ const struct pci_device_id i[]
= z;
// </smpl>
[bhelgaas: add semantic patch]
Signed-off-by: Benoit Taine <benoit.taine@lip6.fr>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Commit "mmc: mmci: Handle CMD irq before DATA irq", caused an issue
when using the ARM model of the PL181 and running QEMU.
The bug was reported for the following QEMU version:
$ qemu-system-arm -version
QEMU emulator version 2.0.0 (Debian 2.0.0+dfsg-2ubuntu1.1), Copyright
(c) 2003-2008 Fabrice Bellard
To resolve the problem, let's restore the old behavior were the DATA
irq is handled prior the CMD irq, but only for the arm_variant, which
the problem was reported for.
Reported-by: John Stultz <john.stultz@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Kees Cook <keescook@chromium.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch won't change the behavior of how mmci deals with CMD irqs.
By moving code from mmci_irq() to mmci_cmd_irq(), we getter a better
overview of what going on.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Kees Cook <keescook@chromium.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
We don't need to verify the content of the status register twice, while
we are about to handle a DATA irq. Instead let's leave all verification
to be handled by mmci_data_irq().
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Kees Cook <keescook@chromium.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
[sonnyrao: fix compile for !CONFIG_MMC_DW_IDMAC case]
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
- Checkpatch fixes throughout the subsystem
- Use Regmap to handle IRQs in max77686, extcon-max77693 and mc13xxx-core
- Use DMA in rtsx_pcr
- Restrict building on unsupported architectures on timberdale, cs5535
- SPI hardening in cros_ec_spi
- More robust error handing in asic3, cros_ec, ab8500-debugfs,
max77686 and pcf50633-core
- Reorder PM runtime and regulator handing during shutdown in arizona
- Enable wakeup in cros_ec_spi
- Unused variable/code clean-up in pm8921-core, cros_ec, htc-i2cpld,
tps65912-spi, wm5110-tables and ab8500-debugfs
- Add regulator handing into suspend() in sec-core
- Remove pointless wrapper functions in extcon-max77693 and i2c-cros-ec-tunnel
- Use cross-architecture friendly data sizes in stmpe-i2c, arizona,
max77686 and tps65910
- Device Tree documentation updates throughout
- Provide power management support in max77686
- Few OF clean-ups in max77686
- Use manged resources in tps6105x
== New drivers/supported devices ==
- Add support for s2mpu02 to sec-core
- Add support for Allwinner A32 to sun6i-prcm
- Add support for Maxim 77802 in max77686
- Add support for DA9063 AD in da9063
- Add new driver for Intel PMICs (generic) and specifically Crystal Cove
== (Re-)moved drivers ==
- Move out keyboard functionality cros_ec ==> input/keyboard/cros_ec_keyb
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Merge tag 'mfd-for-linus-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD update from Lee Jones:
"Changes to existing drivers:
- checkpatch fixes throughout the subsystem
- use Regmap to handle IRQs in max77686, extcon-max77693 and
mc13xxx-core
- use DMA in rtsx_pcr
- restrict building on unsupported architectures on timberdale,
cs5535
- SPI hardening in cros_ec_spi
- more robust error handing in asic3, cros_ec, ab8500-debugfs,
max77686 and pcf50633-core
- reorder PM runtime and regulator handing during shutdown in arizona
- enable wakeup in cros_ec_spi
- unused variable/code clean-up in pm8921-core, cros_ec, htc-i2cpld,
tps65912-spi, wm5110-tables and ab8500-debugfs
- add regulator handing into suspend() in sec-core
- remove pointless wrapper functions in extcon-max77693 and
i2c-cros-ec-tunnel
- use cross-architecture friendly data sizes in stmpe-i2c, arizona,
max77686 and tps65910
- devicetree documentation updates throughout
- provide power management support in max77686
- few OF clean-ups in max77686
- use manged resources in tps6105x
New drivers/supported devices:
- add support for s2mpu02 to sec-core
- add support for Allwinner A32 to sun6i-prcm
- add support for Maxim 77802 in max77686
- add support for DA9063 AD in da9063
- new driver for Intel PMICs (generic) and specifically Crystal Cove
(Re-)moved drivers ==
- move out keyboard functionality cros_ec ==> input/keyboard/cros_ec_keyb"
* tag 'mfd-for-linus-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (101 commits)
MAINTAINERS: Update MFD repo location
mfd: omap-usb-host: Fix improper mask use.
mfd: arizona: Only free the CTRLIF_ERR IRQ if we requested it
mfd: arizona: Add missing handling for ISRC3 under/overclocked
mfd: wm5110: Add new interrupt register definitions
mfd: arizona: Rename thermal shutdown interrupt
mfd: wm5110: Add in the output done interrupts
mfd: wm5110: Remove non-existant interrupts
mfd: tps65912-spi: Remove unused variable
mfd: htc-i2cpld: Remove unused code
mfd: da9063: Add support for AD silicon variant
mfd: arizona: Map MICVDD from extcon device to the Arizona core
mfd: arizona: Add MICVDD to mapped regulators for wm8997
mfd: max77686: Ensure device type IDs are architecture agnostic
mfd: max77686: Add Maxim 77802 PMIC support
mfd: tps6105x: Use managed resources when allocating memory
mfd: wm8997-tables: Suppress 'line over 80 chars' warnings
mfd: kempld-core: Correct a variety of checkpatch warnings
mfd: ipaq-micro: Fix coding style errors/warnings reported by checkpatch
mfd: si476x-cmd: Remedy checkpatch style complains
...
Use the clock framework to get the peripheral clock rate to
correctly set the MMC/SD bus clock divider.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7475/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch changes all absolute SYS_XY registers to offsets from the
SYS block base, prefixes them with AU1000 to avoid silent failures due
to changed addresses, and introduces helper functions to read/write
them.
No functional changes, comparing assembly of a few select functions shows
no differences.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7464/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Sebastian Hesselbarth