338 lines
8.9 KiB
C
338 lines
8.9 KiB
C
/*
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* Copyright 2017 NXP
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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#include <linux/of_platform.h>
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#include <linux/spinlock.h>
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#include <linux/pm_runtime.h>
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#define CHANREG_OFF (irqsteer_data->channum * 4)
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#define CHANCTRL 0x0
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#define CHANMASK(n) (0x4 + 0x4 * (n))
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#define CHANSET(n) (0x4 + (0x4 * (n)) + CHANREG_OFF)
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#define CHANSTATUS(n) (0x4 + (0x4 * (n)) + (CHANREG_OFF * 2))
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#define CHAN_MINTDIS (0x4 + (CHANREG_OFF * 3))
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#define CHAN_MASTRSTAT (CHAN_MINTDIS + 0x4)
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struct irqsteer_irqchip_data {
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struct irq_chip chip;
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spinlock_t lock;
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struct platform_device *pdev;
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void __iomem *regs;
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struct clk *ipg_clk;
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int irq;
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int channum;
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int endian; /* 0: littel endian; 1: big endian */
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struct irq_domain *domain;
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int *saved_reg;
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bool inited;
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unsigned int irqstat[];
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};
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static void imx_irqsteer_irq_unmask(struct irq_data *d)
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{
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struct irqsteer_irqchip_data *irqsteer_data = d->chip_data;
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void __iomem *reg;
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u32 val, idx;
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spin_lock(&irqsteer_data->lock);
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idx = irqsteer_data->endian ?
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(irqsteer_data->channum - d->hwirq / 32 - 1) : d->hwirq / 32;
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reg = irqsteer_data->regs + CHANMASK(idx);
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val = readl_relaxed(reg);
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val |= 1 << (d->hwirq % 32);
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writel_relaxed(val, reg);
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spin_unlock(&irqsteer_data->lock);
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}
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static void imx_irqsteer_irq_mask(struct irq_data *d)
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{
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struct irqsteer_irqchip_data *irqsteer_data = d->chip_data;
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void __iomem *reg;
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u32 val, idx;
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spin_lock(&irqsteer_data->lock);
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idx = irqsteer_data->endian ?
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(irqsteer_data->channum - d->hwirq / 32 - 1) : d->hwirq / 32;
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reg = irqsteer_data->regs + CHANMASK(idx);
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val = readl_relaxed(reg);
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val &= ~(1 << (d->hwirq % 32));
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writel_relaxed(val, reg);
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spin_unlock(&irqsteer_data->lock);
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}
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static void imx_irqsteer_irq_ack(struct irq_data *d)
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{
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/* the irqchip has no ack */
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}
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static struct irq_chip imx_irqsteer_irq_chip = {
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.name = "irqsteer",
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.irq_eoi = irq_chip_eoi_parent,
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.irq_mask = imx_irqsteer_irq_mask,
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.irq_unmask = imx_irqsteer_irq_unmask,
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.irq_ack = imx_irqsteer_irq_ack,
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};
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static int imx_irqsteer_irq_map(struct irq_domain *h, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct irqsteer_irqchip_data *irqsteer_data = h->host_data;
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irq_set_chip_data(irq, h->host_data);
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irq_set_chip_and_handler(irq, &irqsteer_data->chip, handle_level_irq);
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return 0;
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}
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static const struct irq_domain_ops imx_irqsteer_domain_ops = {
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.map = imx_irqsteer_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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static void imx_irqsteer_init(struct irqsteer_irqchip_data *irqsteer_data)
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{
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/* enable channel 1 in default */
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writel_relaxed(1, irqsteer_data->regs + CHANCTRL);
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/* read back CHANCTRL register cannot reflact on HW register
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* real value due to the HW action, so add one flag here.
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*/
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irqsteer_data->inited = true;
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}
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static void imx_irqsteer_update_irqstat(struct irqsteer_irqchip_data *irqsteer_data)
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{
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int i;
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/*
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* From irq steering doc, there have one mapping:
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* word[0] bit 31 -> irq 31 ... word[0] bit 0 -> irq 0
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* word[1] bit 31 -> irq 63 ... word[1] bit 0 -> irq 32
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* ......
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* word[15] bit 31 -> irq 511 ... word[15] bit 0 -> irq 480
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*/
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for (i = 0; i < irqsteer_data->channum; i++)
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irqsteer_data->irqstat[i] = readl_relaxed(irqsteer_data->regs +
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CHANSTATUS(irqsteer_data->endian ?
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(irqsteer_data->channum - i - 1) :
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i));
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}
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static void imx_irqsteer_irq_handler(struct irq_desc *desc)
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{
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struct irqsteer_irqchip_data *irqsteer_data = irq_desc_get_handler_data(desc);
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unsigned long val;
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int irqnum;
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int pos, virq;
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chained_irq_enter(irq_desc_get_chip(desc), desc);
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val = readl_relaxed(irqsteer_data->regs + CHAN_MASTRSTAT);
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if (!val)
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goto out;
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imx_irqsteer_update_irqstat(irqsteer_data);
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irqnum = irqsteer_data->channum * 32;
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for_each_set_bit(pos, (unsigned long *)irqsteer_data->irqstat, irqnum) {
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virq = irq_find_mapping(irqsteer_data->domain, pos);
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if (virq)
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generic_handle_irq(virq);
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}
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out:
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chained_irq_exit(irq_desc_get_chip(desc), desc);
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}
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static int imx_irqsteer_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct irqsteer_irqchip_data *irqsteer_data;
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struct resource *res;
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int channum, endian;
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int ret;
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ret = of_property_read_u32(np, "nxp,irqsteer_chans", &channum);
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if (ret)
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channum = 1;
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ret = of_property_read_u32(np, "nxp,endian", &endian);
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if (ret)
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/* default is LSB */
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endian = 0;
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irqsteer_data = devm_kzalloc(&pdev->dev, sizeof(*irqsteer_data) +
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channum *
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sizeof(irqsteer_data->irqstat[0]),
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GFP_KERNEL);
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if (!irqsteer_data)
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return -ENOMEM;
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irqsteer_data->saved_reg = devm_kzalloc(&pdev->dev, sizeof(int) *
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(channum + 1), GFP_KERNEL);
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if (!irqsteer_data->saved_reg)
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return -ENOMEM;
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irqsteer_data->chip = imx_irqsteer_irq_chip;
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irqsteer_data->chip.parent_device = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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irqsteer_data->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(irqsteer_data->regs)) {
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dev_err(&pdev->dev, "failed to initialize reg\n");
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return PTR_ERR(irqsteer_data->regs);
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}
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irqsteer_data->irq = platform_get_irq(pdev, 0);
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if (irqsteer_data->irq <= 0) {
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dev_err(&pdev->dev, "failed to get irq\n");
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return -ENODEV;
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}
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irqsteer_data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
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if (IS_ERR(irqsteer_data->ipg_clk)) {
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ret = PTR_ERR(irqsteer_data->ipg_clk);
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dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret);
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return ret;
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}
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irqsteer_data->channum = channum;
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irqsteer_data->endian = endian;
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irqsteer_data->pdev = pdev;
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irqsteer_data->inited = false;
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spin_lock_init(&irqsteer_data->lock);
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irqsteer_data->domain = irq_domain_add_linear(np,
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irqsteer_data->channum * 32,
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&imx_irqsteer_domain_ops,
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irqsteer_data);
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if (!irqsteer_data->domain) {
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dev_err(&irqsteer_data->pdev->dev,
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"failed to create IRQ domain\n");
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return -ENOMEM;
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}
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irq_set_chained_handler_and_data(irqsteer_data->irq,
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imx_irqsteer_irq_handler,
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irqsteer_data);
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platform_set_drvdata(pdev, irqsteer_data);
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pm_runtime_enable(&pdev->dev);
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return 0;
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}
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static int imx_irqsteer_remove(struct platform_device *pdev)
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{
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struct irqsteer_irqchip_data *irqsteer_data = platform_get_drvdata(pdev);
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irq_set_chained_handler_and_data(irqsteer_data->irq, NULL, NULL);
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irq_domain_remove(irqsteer_data->domain);
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return pm_runtime_force_suspend(&pdev->dev);
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}
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#ifdef CONFIG_PM_SLEEP
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static void imx_irqsteer_save_regs(struct irqsteer_irqchip_data *data)
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{
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int num;
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data->saved_reg[0] = readl_relaxed(data->regs + CHANCTRL);
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for (num = 0; num < data->channum; num++)
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data->saved_reg[num + 1] = readl_relaxed(data->regs + CHANMASK(num));
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}
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static void imx_irqsteer_restore_regs(struct irqsteer_irqchip_data *data)
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{
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int num;
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writel_relaxed(data->saved_reg[0], data->regs + CHANCTRL);
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for (num = 0; num < data->channum; num++)
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writel_relaxed(data->saved_reg[num + 1], data->regs + CHANMASK(num));
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}
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static int imx_irqsteer_runtime_suspend(struct device *dev)
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{
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struct irqsteer_irqchip_data *irqsteer_data = dev_get_drvdata(dev);
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/* After device's runtime suspended, device's power domain maybe off,
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* if some sub_irqs resouces are not freed, it needs to save registers
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* when device's suspend force runtime suspend. And even if all sub_irqs
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* are freed, it also needs to save CHANCTRL register.
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*/
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imx_irqsteer_save_regs(irqsteer_data);
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clk_disable_unprepare(irqsteer_data->ipg_clk);
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return 0;
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}
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static int imx_irqsteer_runtime_resume(struct device *dev)
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{
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struct irqsteer_irqchip_data *irqsteer_data = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(irqsteer_data->ipg_clk);
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if (ret) {
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dev_err(dev, "failed to enable ipg clk: %d\n", ret);
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return ret;
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}
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/* don't need restore registers when first sub_irq requested */
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if (!irqsteer_data->inited)
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imx_irqsteer_init(irqsteer_data);
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else
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imx_irqsteer_restore_regs(irqsteer_data);
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return 0;
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}
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static const struct dev_pm_ops imx_irqsteer_pm_ops = {
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SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
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pm_runtime_force_resume)
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SET_RUNTIME_PM_OPS(imx_irqsteer_runtime_suspend,
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imx_irqsteer_runtime_resume, NULL)
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};
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#define IMX_IRQSTEER_PM (&imx_irqsteer_pm_ops)
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#else
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#define IMX_IRQSTEER_PM NULL
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#endif
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static const struct of_device_id imx_irqsteer_id[] = {
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{ .compatible = "nxp,imx-irqsteer", },
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{},
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};
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static struct platform_driver imx_irqsteer_driver = {
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.driver = {
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.name = "imx-irqsteer",
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.of_match_table = imx_irqsteer_id,
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.pm = IMX_IRQSTEER_PM,
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},
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.probe = imx_irqsteer_probe,
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.remove = imx_irqsteer_remove,
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};
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static int __init irq_imx_irqsteer_init(void)
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{
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return platform_driver_register(&imx_irqsteer_driver);
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}
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arch_initcall(irq_imx_irqsteer_init);
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MODULE_AUTHOR("NXP Semiconductor");
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MODULE_DESCRIPTION("NXP i.MX8 irq steering driver");
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MODULE_LICENSE("GPL v2");
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