Shawn Guo c622f398c0 mmc: sdhci-esdhc-imx: separate 100/200 MHz pinctrl states check ... As indicated by function esdhc_change_pinstate(), SDR50 and DDR50 require pins_100mhz, while SDR104 and HS400 require pins_200mhz. Some system design may support SDR50 and DDR50 with 100mhz pin state only (without 200mhz one). Currently the combined 100/200 MHz pinctrl state check prevents such system from running SDR50 and DDR50. Separate the check to support such system design. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>		2021-04-20 14:48:59 +08:00
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core	mmc: pwrseq_simple: select pinctrl state during suspend/resume	2020-10-08 20:07:14 +02:00
host	mmc: sdhci-esdhc-imx: separate 100/200 MHz pinctrl states check	2021-04-20 14:48:59 +08:00
Kconfig	mmc: core: Add parameter use_blk_mq	2018-10-29 11:10:38 +08:00
Makefile	mmc: Kconfig: downgrade CONFIG_MMC_DEBUG for host drivers only	2017-08-30 14:01:34 +02:00