110 lines
2.8 KiB
C
110 lines
2.8 KiB
C
/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/slab.h>
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#include <soc/imx8/sc/sci.h>
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#include "../core.h"
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#include "pinctrl-imx.h"
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sc_ipc_t pinctrl_ipcHandle;
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int imx_pmx_set_one_pin_scu(struct imx_pinctrl *ipctl, struct imx_pin *pin)
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{
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return 0;
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}
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int imx_pinconf_backend_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
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unsigned long *config)
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{
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sc_err_t err = SC_ERR_NONE;
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sc_ipc_t ipc = pinctrl_ipcHandle;
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if (ipc == -1) {
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printk("IPC handle not initialized!\n");
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return -EIO;
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}
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err = sc_pad_get(ipc, pin_id, (unsigned int *)config);
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if (err != SC_ERR_NONE)
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return -EIO;
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return 0;
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}
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int imx_pinconf_backend_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
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unsigned long *configs, unsigned num_configs)
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{
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sc_err_t err = SC_ERR_NONE;
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sc_ipc_t ipc = pinctrl_ipcHandle;
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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/*
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* Mux should be done in pmx set, but we do not have a good api
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* to handle that in scfw, so config it in pad conf func
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*/
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unsigned int mux = configs[0];
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unsigned int val = configs[1];
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if (ipc == -1) {
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printk("IPC handle not initialized!\n");
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return -EIO;
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}
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if (info->flags & IMX8_ENABLE_MUX_CONFIG)
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val |= BM_IMX8_IFMUX_ENABLE;
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if (info->flags & IMX8_ENABLE_PAD_CONFIG)
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val |= BM_IMX8_GP_ENABLE;
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if (info->flags & SHARE_MUX_CONF_REG) {
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val |= (mux << 27) & (0x7 << 27);
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err = sc_pad_set(ipc, pin_id, val);
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}
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if (err != SC_ERR_NONE)
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return -EIO;
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return 0;
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}
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int imx_pinctrl_parse_pin_scu(struct imx_pinctrl_soc_info *info,
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unsigned int *pin_id, struct imx_pin *pin,
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const __be32 **list_p, u32 generic_config)
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{
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struct imx_pin_scu *pin_scu = &pin->pin_conf.pin_scu;
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pin->pin = be32_to_cpu(*((*list_p)++));
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*pin_id = pin->pin;
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pin_scu->mux = be32_to_cpu(*((*list_p)++));
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pin_scu->config = be32_to_cpu(*((*list_p)++));
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dev_dbg(info->dev, "%s: 0x%lx 0x%lx",
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info->pins[pin->pin].name, pin_scu->mux, pin_scu->config);
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return 0;
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}
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