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remarkable-linux/include/linux/phy
Robert Chiras f8f8ce47c3 MLK-16918-5: drm: Implement NWL MIPI-DSI as a real drm_bridge
Currently, the Northwest Logic MIPI-DSI controller host specific code
resides under drm/bridge, but is not a real drm_bridge. It creates a
drm_bridge and adds itself to the drm_encoder that handles this file,
but this is wrong, since it does not implement the drm_bridge_funcs.

The correct way to implement a drm_bridge is to add the drm_bridge and
let other components (another bridge or a drm_encoder) to attach to this
bridge.
Since we are doing this, a new compatible strings can be used for this
driver: "nwl,mipi-dsi".

Since this was used by nwl_dsi-imx.c, update that driver to use this
bridge correctly.

This is needed in order to add support for MIPI-DSI on 8MQ. The IMX_NWL
driver will either add a DSI encoder to DRM, or a DSI bridge.
The encoder will be used by imx-drm-core driver, while the bridge
will be used by MXSFB driver (which creates a simple display pipe).

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
2018-10-29 11:10:38 +08:00
..
tegra phy: Add Tegra XUSB pad controller support 2016-04-29 16:44:47 +02:00
omap_control_phy.h
omap_usb.h
phy-mixel-lvds-combo.h MLK-15001-22 phy: Add Mixel LVDS combo PHY support 2018-10-29 11:10:38 +08:00
phy-mixel-lvds.h MLK-15001-20 phy: Add Mixel LVDS PHY support 2018-10-29 11:10:38 +08:00
phy-mixel-mipi-dsi.h MLK-16918-5: drm: Implement NWL MIPI-DSI as a real drm_bridge 2018-10-29 11:10:38 +08:00
phy-qcom-ufs.h scsi: ufs-qcom: phy/hcd: Refactoring phy clock handling 2016-11-08 18:05:45 -05:00
phy-sun4i-usb.h
phy.h phy: add sgmii and 10gkr modes to the phy_mode enum 2017-08-30 15:17:45 -07:00
ulpi_phy.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00