130 lines
3.8 KiB
C
130 lines
3.8 KiB
C
/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*!
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* @file devices/MX8/include/fsl_bitaccess.h
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*
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* Header file containing register access macros.
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*
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* \addtogroup Peripheral_access_layer (HAL) Device Peripheral Access Layer
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*
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* @{
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*/
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#ifndef _FSL_BITACCESS_H
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#define _FSL_BITACCESS_H 1
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/*!
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* @addtogroup SCF Register Access Macros
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* @{
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*/
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/*
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* Macros for single instance registers
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*/
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#define BF_SET(reg, field) HW_##reg##_SET(BM_##reg##_##field)
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#define BF_CLR(reg, field) HW_##reg##_CLR(BM_##reg##_##field)
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#define BF_TOG(reg, field) HW_##reg##_TOG(BM_##reg##_##field)
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#define BF_SETV(reg, field, v) HW_##reg##_SET(BF_##reg##_##field(v))
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#define BF_CLRV(reg, field, v) HW_##reg##_CLR(BF_##reg##_##field(v))
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#define BF_TOGV(reg, field, v) HW_##reg##_TOG(BF_##reg##_##field(v))
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#define BV_FLD(reg, field, sym) BF_##reg##_##field(BV_##reg##_##field##__##sym)
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#define BV_VAL(reg, field, sym) BV_##reg##_##field##__##sym
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#define BF_RD(reg, field) HW_##reg.B.field
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#define BF_WR(reg, field, v) BW_##reg##_##field(v)
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/*******************************************************************************
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* Macros to create bitfield mask, shift, and width from CMSIS definitions
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******************************************************************************/
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/* Bitfield Mask */
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#define SCF_BMSK(bit) (bit ## _MASK)
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/* Bitfield Left Shift */
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#define SCF_BLSH(bit) (bit ## _SHIFT)
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/* Bitfield Width */
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#define SCF_BWID(bit) (bit ## _WIDTH)
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/* Bitfield Value */
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#define SCF_BVAL(bit, val) ((val) << (SCF_BLSH(bit)))
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/*******************************************************************************
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* Macros to set, clear, extact, and insert bitfields into register structures
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* or local variables
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******************************************************************************/
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/* Bitfield Set */
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#define SCF_BSET(var, bit) (var |= (SCF_BMSK(bit)))
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/* Bitfield Clear */
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#define SCF_BCLR(var, bit) (var &= (~(SCF_BMSK(bit))))
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/* Bitfield Extract */
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#define SCF_BEXR(var, bit) ((var & (SCF_BMSK(bit))) >> (SCF_BLSH(bit)))
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/* Bitfield Insert */
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#define SCF_BINS(var, bit, val) (var = (var & (~(SCF_BMSK(bit)))) | SCF_BVAL(bit, val))
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/*******************************************************************************
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* Macros to set, clear, extact, and insert bitfields into register structures
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* that support SCT
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******************************************************************************/
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#ifdef EMUL
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/* Emulation does not have SCT hardware and must fallback to non-SCT definitions */
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/* SCT Bitfield Set */
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#define SCF_SCT_BSET(var, bit) (SCF_BSET(var, bit))
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/* SCT Bitfield Clear */
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#define SCF_SCT_BCLR(var, bit) (SCF_BCLR(var, bit))
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/* SCT Bitfield Insert */
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#define SCF_SCT_BINS(var, bit, val) (SCF_BINS(var, bit, val))
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#else
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/*! @todo Port macros leverage SCT register access hardware */
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/* SCT Bitfield Set */
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#define SCF_SCT_BSET(var, bit) (SCF_BSET(var, bit))
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/* SCT Bitfield Clear */
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#define SCF_SCT_BCLR(var, bit) (SCF_BCLR(var, bit))
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/* SCT Bitfield Insert */
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#define SCF_SCT_BINS(var, bit, val) (SCF_BINS(var, bit, val))
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#endif /* EMUL */
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/*!
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* @}
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*/ /* end of group SCF */
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/*!
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* @}
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*/ /* end of group Peripheral_access_layer */
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#endif /* _FSL_BITACCESS_H */
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/******************************************************************************/
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