![Ai Kyuse](/assets/img/avatar_default.png)
Add support for r8a7796 SoC. Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
493 lines
13 KiB
C
493 lines
13 KiB
C
/*
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* SuperH Mobile SDHI
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*
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* Copyright (C) 2016 Sang Engineering, Wolfram Sang
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* Copyright (C) 2015-16 Renesas Electronics Corporation
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* Copyright (C) 2009 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Based on "Compaq ASIC3 support":
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*
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* Copyright 2001 Compaq Computer Corporation.
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* Copyright 2004-2005 Phil Blundell
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* Copyright 2007-2008 OpenedHand Ltd.
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*
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* Authors: Phil Blundell <pb@handhelds.org>,
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* Samuel Ortiz <sameo@openedhand.com>
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*
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*/
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/slab.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/mmc/host.h>
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#include <linux/mfd/tmio.h>
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#include <linux/sh_dma.h>
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#include <linux/delay.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/pinctrl-state.h>
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#include <linux/regulator/consumer.h>
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#include "tmio_mmc.h"
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#define EXT_ACC 0xe4
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#define SDHI_VER_GEN2_SDR50 0x490c
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/* very old datasheets said 0x490c for SDR104, too. They are wrong! */
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#define SDHI_VER_GEN2_SDR104 0xcb0d
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#define SDHI_VER_GEN3_SD 0xcc10
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#define SDHI_VER_GEN3_SDMMC 0xcd10
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#define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
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struct sh_mobile_sdhi_of_data {
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unsigned long tmio_flags;
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unsigned long capabilities;
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unsigned long capabilities2;
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enum dma_slave_buswidth dma_buswidth;
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dma_addr_t dma_rx_offset;
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unsigned bus_shift;
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};
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static const struct sh_mobile_sdhi_of_data of_default_cfg = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
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};
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static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
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TMIO_MMC_CLK_ACTUAL,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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};
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static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
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TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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.dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
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.dma_rx_offset = 0x2000,
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};
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static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
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TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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.bus_shift = 2,
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};
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static const struct of_device_id sh_mobile_sdhi_of_match[] = {
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{ .compatible = "renesas,sdhi-shmobile" },
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{ .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
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{ .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
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{ .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
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{ .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
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{ .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
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{ .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
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{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
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{},
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};
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MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
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struct sh_mobile_sdhi {
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struct clk *clk;
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struct tmio_mmc_data mmc_data;
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struct tmio_mmc_dma dma_priv;
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struct pinctrl *pinctrl;
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struct pinctrl_state *pins_default, *pins_uhs;
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};
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static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
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{
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u32 val;
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/*
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* see also
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* sh_mobile_sdhi_of_data :: dma_buswidth
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*/
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switch (sd_ctrl_read16(host, CTL_VERSION)) {
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case SDHI_VER_GEN2_SDR50:
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val = (width == 32) ? 0x0001 : 0x0000;
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break;
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case SDHI_VER_GEN2_SDR104:
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val = (width == 32) ? 0x0000 : 0x0001;
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break;
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case SDHI_VER_GEN3_SD:
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case SDHI_VER_GEN3_SDMMC:
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if (width == 64)
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val = 0x0000;
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else if (width == 32)
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val = 0x0101;
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else
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val = 0x0001;
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break;
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default:
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/* nothing to do */
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return;
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}
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sd_ctrl_write16(host, EXT_ACC, val);
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}
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static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host *host)
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{
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struct mmc_host *mmc = host->mmc;
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struct sh_mobile_sdhi *priv = host_to_priv(host);
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int ret = clk_prepare_enable(priv->clk);
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if (ret < 0)
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return ret;
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/*
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* The clock driver may not know what maximum frequency
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* actually works, so it should be set with the max-frequency
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* property which will already have been read to f_max. If it
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* was missing, assume the current frequency is the maximum.
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*/
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if (!mmc->f_max)
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mmc->f_max = clk_get_rate(priv->clk);
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/*
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* Minimum frequency is the minimum input clock frequency
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* divided by our maximum divider.
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*/
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mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L);
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/* enable 16bit data access on SDBUF as default */
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sh_mobile_sdhi_sdbuf_width(host, 16);
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return 0;
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}
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static unsigned int sh_mobile_sdhi_clk_update(struct tmio_mmc_host *host,
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unsigned int new_clock)
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{
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struct sh_mobile_sdhi *priv = host_to_priv(host);
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unsigned int freq, diff, best_freq = 0, diff_min = ~0;
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int i, ret;
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/* tested only on RCar Gen2+ currently; may work for others */
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if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
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return clk_get_rate(priv->clk);
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/*
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* We want the bus clock to be as close as possible to, but no
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* greater than, new_clock. As we can divide by 1 << i for
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* any i in [0, 9] we want the input clock to be as close as
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* possible, but no greater than, new_clock << i.
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*/
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for (i = min(9, ilog2(UINT_MAX / new_clock)); i >= 0; i--) {
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freq = clk_round_rate(priv->clk, new_clock << i);
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if (freq > (new_clock << i)) {
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/* Too fast; look for a slightly slower option */
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freq = clk_round_rate(priv->clk,
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(new_clock << i) / 4 * 3);
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if (freq > (new_clock << i))
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continue;
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}
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diff = new_clock - (freq >> i);
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if (diff <= diff_min) {
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best_freq = freq;
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diff_min = diff;
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}
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}
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ret = clk_set_rate(priv->clk, best_freq);
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return ret == 0 ? best_freq : clk_get_rate(priv->clk);
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}
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static void sh_mobile_sdhi_clk_disable(struct tmio_mmc_host *host)
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{
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struct sh_mobile_sdhi *priv = host_to_priv(host);
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clk_disable_unprepare(priv->clk);
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}
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static int sh_mobile_sdhi_card_busy(struct mmc_host *mmc)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_DAT0);
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}
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static int sh_mobile_sdhi_start_signal_voltage_switch(struct mmc_host *mmc,
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struct mmc_ios *ios)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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struct sh_mobile_sdhi *priv = host_to_priv(host);
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struct pinctrl_state *pin_state;
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int ret;
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switch (ios->signal_voltage) {
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case MMC_SIGNAL_VOLTAGE_330:
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pin_state = priv->pins_default;
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break;
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case MMC_SIGNAL_VOLTAGE_180:
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pin_state = priv->pins_uhs;
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break;
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default:
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return -EINVAL;
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}
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/*
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* If anything is missing, assume signal voltage is fixed at
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* 3.3V and succeed/fail accordingly.
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*/
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if (IS_ERR(priv->pinctrl) || IS_ERR(pin_state))
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return ios->signal_voltage ==
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MMC_SIGNAL_VOLTAGE_330 ? 0 : -EINVAL;
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ret = mmc_regulator_set_vqmmc(host->mmc, ios);
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if (ret)
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return ret;
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return pinctrl_select_state(priv->pinctrl, pin_state);
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}
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static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
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{
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int timeout = 1000;
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while (--timeout && !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS)
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& TMIO_STAT_SCLKDIVEN))
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udelay(1);
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if (!timeout) {
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dev_warn(&host->pdev->dev, "timeout waiting for SD bus idle\n");
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return -EBUSY;
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}
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return 0;
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}
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static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
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{
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switch (addr)
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{
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case CTL_SD_CMD:
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case CTL_STOP_INTERNAL_ACTION:
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case CTL_XFER_BLK_COUNT:
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case CTL_SD_CARD_CLK_CTL:
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case CTL_SD_XFER_LEN:
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case CTL_SD_MEM_CARD_OPT:
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case CTL_TRANSACTION_CTL:
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case CTL_DMA_ENABLE:
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case EXT_ACC:
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return sh_mobile_sdhi_wait_idle(host);
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}
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return 0;
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}
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static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card,
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unsigned int direction, int blk_size)
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{
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/*
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* In Renesas controllers, when performing a
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* multiple block read of one or two blocks,
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* depending on the timing with which the
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* response register is read, the response
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* value may not be read properly.
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* Use single block read for this HW bug
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*/
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if ((direction == MMC_DATA_READ) &&
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blk_size == 2)
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return 1;
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return blk_size;
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}
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static void sh_mobile_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
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{
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sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
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/* enable 32bit access if DMA mode if possibile */
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sh_mobile_sdhi_sdbuf_width(host, enable ? 32 : 16);
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}
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static int sh_mobile_sdhi_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id =
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of_match_device(sh_mobile_sdhi_of_match, &pdev->dev);
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struct sh_mobile_sdhi *priv;
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struct tmio_mmc_data *mmc_data;
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struct tmio_mmc_data *mmd = pdev->dev.platform_data;
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struct tmio_mmc_host *host;
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struct resource *res;
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int irq, ret, i = 0;
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struct tmio_mmc_dma *dma_priv;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -EINVAL;
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priv = devm_kzalloc(&pdev->dev, sizeof(struct sh_mobile_sdhi), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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mmc_data = &priv->mmc_data;
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dma_priv = &priv->dma_priv;
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priv->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(priv->clk)) {
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ret = PTR_ERR(priv->clk);
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dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
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goto eprobe;
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}
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priv->pinctrl = devm_pinctrl_get(&pdev->dev);
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if (!IS_ERR(priv->pinctrl)) {
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priv->pins_default = pinctrl_lookup_state(priv->pinctrl,
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PINCTRL_STATE_DEFAULT);
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priv->pins_uhs = pinctrl_lookup_state(priv->pinctrl,
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"state_uhs");
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}
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host = tmio_mmc_host_alloc(pdev);
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if (!host) {
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ret = -ENOMEM;
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goto eprobe;
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}
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if (of_id && of_id->data) {
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const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
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mmc_data->flags |= of_data->tmio_flags;
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mmc_data->capabilities |= of_data->capabilities;
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mmc_data->capabilities2 |= of_data->capabilities2;
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mmc_data->dma_rx_offset = of_data->dma_rx_offset;
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dma_priv->dma_buswidth = of_data->dma_buswidth;
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host->bus_shift = of_data->bus_shift;
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}
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host->dma = dma_priv;
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host->write16_hook = sh_mobile_sdhi_write16_hook;
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host->clk_enable = sh_mobile_sdhi_clk_enable;
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host->clk_update = sh_mobile_sdhi_clk_update;
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host->clk_disable = sh_mobile_sdhi_clk_disable;
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host->multi_io_quirk = sh_mobile_sdhi_multi_io_quirk;
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/* SDR speeds are only available on Gen2+ */
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if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
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/* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */
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host->card_busy = sh_mobile_sdhi_card_busy;
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host->start_signal_voltage_switch =
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sh_mobile_sdhi_start_signal_voltage_switch;
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}
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/* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
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if (!host->bus_shift && resource_size(res) > 0x100) /* old way to determine the shift */
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host->bus_shift = 1;
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if (mmd)
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*mmc_data = *mmd;
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dma_priv->filter = shdma_chan_filter;
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dma_priv->enable = sh_mobile_sdhi_enable_dma;
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mmc_data->alignment_shift = 1; /* 2-byte alignment */
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mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED;
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/*
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* All SDHI blocks support 2-byte and larger block sizes in 4-bit
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* bus width mode.
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*/
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mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES;
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/*
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* All SDHI blocks support SDIO IRQ signalling.
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*/
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mmc_data->flags |= TMIO_MMC_SDIO_IRQ;
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/*
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* All SDHI have CMD12 controll bit
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*/
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mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
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/*
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* All SDHI need SDIO_INFO1 reserved bit
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*/
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mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
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ret = tmio_mmc_host_probe(host, mmc_data);
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if (ret < 0)
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goto efree;
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while (1) {
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irq = platform_get_irq(pdev, i);
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if (irq < 0)
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break;
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i++;
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ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0,
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dev_name(&pdev->dev), host);
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if (ret)
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goto eirq;
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}
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/* There must be at least one IRQ source */
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if (!i) {
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ret = irq;
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goto eirq;
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}
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dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n",
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mmc_hostname(host->mmc), (unsigned long)
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(platform_get_resource(pdev, IORESOURCE_MEM, 0)->start),
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host->mmc->f_max / 1000000);
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return ret;
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eirq:
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tmio_mmc_host_remove(host);
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efree:
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tmio_mmc_host_free(host);
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eprobe:
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return ret;
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}
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static int sh_mobile_sdhi_remove(struct platform_device *pdev)
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{
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struct mmc_host *mmc = platform_get_drvdata(pdev);
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struct tmio_mmc_host *host = mmc_priv(mmc);
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tmio_mmc_host_remove(host);
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return 0;
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}
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static const struct dev_pm_ops tmio_mmc_dev_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
|
|
pm_runtime_force_resume)
|
|
SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
|
|
tmio_mmc_host_runtime_resume,
|
|
NULL)
|
|
};
|
|
|
|
static struct platform_driver sh_mobile_sdhi_driver = {
|
|
.driver = {
|
|
.name = "sh_mobile_sdhi",
|
|
.pm = &tmio_mmc_dev_pm_ops,
|
|
.of_match_table = sh_mobile_sdhi_of_match,
|
|
},
|
|
.probe = sh_mobile_sdhi_probe,
|
|
.remove = sh_mobile_sdhi_remove,
|
|
};
|
|
|
|
module_platform_driver(sh_mobile_sdhi_driver);
|
|
|
|
MODULE_DESCRIPTION("SuperH Mobile SDHI driver");
|
|
MODULE_AUTHOR("Magnus Damm");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:sh_mobile_sdhi");
|