![Wolfram Sang](/assets/img/avatar_default.png)
We need to add R1 without CRC support, refactor the bus width routine a little and extend a quirk check. To support "non-removable;" we need a workaround which will be hopefully removed when reworking PM soon. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
271 lines
8.2 KiB
C
271 lines
8.2 KiB
C
/*
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* linux/drivers/mmc/host/tmio_mmc.h
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*
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* Copyright (C) 2016 Sang Engineering, Wolfram Sang
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* Copyright (C) 2015-16 Renesas Electronics Corporation
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* Copyright (C) 2007 Ian Molton
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* Copyright (C) 2004 Ian Molton
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Driver for the MMC / SD / SDIO cell found in:
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*
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* TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
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*/
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#ifndef TMIO_MMC_H
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#define TMIO_MMC_H
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#include <linux/dmaengine.h>
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#include <linux/highmem.h>
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#include <linux/mutex.h>
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#include <linux/pagemap.h>
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#include <linux/scatterlist.h>
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#include <linux/spinlock.h>
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#define CTL_SD_CMD 0x00
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#define CTL_ARG_REG 0x04
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#define CTL_STOP_INTERNAL_ACTION 0x08
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#define CTL_XFER_BLK_COUNT 0xa
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#define CTL_RESPONSE 0x0c
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/* driver merges STATUS and following STATUS2 */
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#define CTL_STATUS 0x1c
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/* driver merges IRQ_MASK and following IRQ_MASK2 */
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#define CTL_IRQ_MASK 0x20
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#define CTL_SD_CARD_CLK_CTL 0x24
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#define CTL_SD_XFER_LEN 0x26
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#define CTL_SD_MEM_CARD_OPT 0x28
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#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
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#define CTL_SD_DATA_PORT 0x30
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#define CTL_TRANSACTION_CTL 0x34
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#define CTL_SDIO_STATUS 0x36
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#define CTL_SDIO_IRQ_MASK 0x38
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#define CTL_DMA_ENABLE 0xd8
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#define CTL_RESET_SD 0xe0
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#define CTL_VERSION 0xe2
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#define CTL_SDIO_REGS 0x100
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#define CTL_CLK_AND_WAIT_CTL 0x138
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#define CTL_RESET_SDIO 0x1e0
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/* Definitions for values the CTRL_STATUS register can take. */
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#define TMIO_STAT_CMDRESPEND BIT(0)
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#define TMIO_STAT_DATAEND BIT(2)
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#define TMIO_STAT_CARD_REMOVE BIT(3)
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#define TMIO_STAT_CARD_INSERT BIT(4)
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#define TMIO_STAT_SIGSTATE BIT(5)
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#define TMIO_STAT_WRPROTECT BIT(7)
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#define TMIO_STAT_CARD_REMOVE_A BIT(8)
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#define TMIO_STAT_CARD_INSERT_A BIT(9)
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#define TMIO_STAT_SIGSTATE_A BIT(10)
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/* These belong technically to CTRL_STATUS2, but the driver merges them */
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#define TMIO_STAT_CMD_IDX_ERR BIT(16)
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#define TMIO_STAT_CRCFAIL BIT(17)
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#define TMIO_STAT_STOPBIT_ERR BIT(18)
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#define TMIO_STAT_DATATIMEOUT BIT(19)
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#define TMIO_STAT_RXOVERFLOW BIT(20)
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#define TMIO_STAT_TXUNDERRUN BIT(21)
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#define TMIO_STAT_CMDTIMEOUT BIT(22)
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#define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
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#define TMIO_STAT_RXRDY BIT(24)
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#define TMIO_STAT_TXRQ BIT(25)
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#define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
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#define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
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#define TMIO_STAT_CMD_BUSY BIT(30)
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#define TMIO_STAT_ILL_ACCESS BIT(31)
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#define CLK_CTL_DIV_MASK 0xff
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#define CLK_CTL_SCLKEN BIT(8)
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#define CARD_OPT_WIDTH8 BIT(13)
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#define CARD_OPT_WIDTH BIT(15)
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#define TMIO_BBS 512 /* Boot block size */
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/* Definitions for values the CTRL_SDIO_STATUS register can take. */
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#define TMIO_SDIO_STAT_IOIRQ 0x0001
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#define TMIO_SDIO_STAT_EXPUB52 0x4000
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#define TMIO_SDIO_STAT_EXWT 0x8000
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#define TMIO_SDIO_MASK_ALL 0xc007
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/* Define some IRQ masks */
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/* This is the mask used at reset by the chip */
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#define TMIO_MASK_ALL 0x837f031d
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#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
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#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
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#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
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TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
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#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
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struct tmio_mmc_data;
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struct tmio_mmc_host;
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struct tmio_mmc_dma {
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enum dma_slave_buswidth dma_buswidth;
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bool (*filter)(struct dma_chan *chan, void *arg);
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void (*enable)(struct tmio_mmc_host *host, bool enable);
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};
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struct tmio_mmc_host {
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void __iomem *ctl;
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struct mmc_command *cmd;
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struct mmc_request *mrq;
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struct mmc_data *data;
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struct mmc_host *mmc;
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/* Callbacks for clock / power control */
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void (*set_pwr)(struct platform_device *host, int state);
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void (*set_clk_div)(struct platform_device *host, int state);
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/* pio related stuff */
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struct scatterlist *sg_ptr;
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struct scatterlist *sg_orig;
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unsigned int sg_len;
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unsigned int sg_off;
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unsigned long bus_shift;
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struct platform_device *pdev;
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struct tmio_mmc_data *pdata;
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struct tmio_mmc_dma *dma;
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/* DMA support */
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bool force_pio;
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struct dma_chan *chan_rx;
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struct dma_chan *chan_tx;
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struct tasklet_struct dma_complete;
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struct tasklet_struct dma_issue;
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struct scatterlist bounce_sg;
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u8 *bounce_buf;
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/* Track lost interrupts */
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struct delayed_work delayed_reset_work;
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struct work_struct done;
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/* Cache */
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u32 sdcard_irq_mask;
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u32 sdio_irq_mask;
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unsigned int clk_cache;
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spinlock_t lock; /* protect host private data */
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unsigned long last_req_ts;
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struct mutex ios_lock; /* protect set_ios() context */
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bool native_hotplug;
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bool sdio_irq_enabled;
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int (*write16_hook)(struct tmio_mmc_host *host, int addr);
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int (*clk_enable)(struct tmio_mmc_host *host);
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unsigned int (*clk_update)(struct tmio_mmc_host *host,
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unsigned int new_clock);
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void (*clk_disable)(struct tmio_mmc_host *host);
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int (*multi_io_quirk)(struct mmc_card *card,
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unsigned int direction, int blk_size);
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int (*card_busy)(struct mmc_host *mmc);
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int (*start_signal_voltage_switch)(struct mmc_host *mmc,
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struct mmc_ios *ios);
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};
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struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
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void tmio_mmc_host_free(struct tmio_mmc_host *host);
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int tmio_mmc_host_probe(struct tmio_mmc_host *host,
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struct tmio_mmc_data *pdata);
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void tmio_mmc_host_remove(struct tmio_mmc_host *host);
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void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
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void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
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void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
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irqreturn_t tmio_mmc_irq(int irq, void *devid);
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static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
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unsigned long *flags)
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{
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local_irq_save(*flags);
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return kmap_atomic(sg_page(sg)) + sg->offset;
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}
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static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
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unsigned long *flags, void *virt)
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{
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kunmap_atomic(virt - sg->offset);
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local_irq_restore(*flags);
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}
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#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
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void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data);
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void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable);
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void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata);
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void tmio_mmc_release_dma(struct tmio_mmc_host *host);
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void tmio_mmc_abort_dma(struct tmio_mmc_host *host);
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#else
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static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
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struct mmc_data *data)
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{
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}
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static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
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{
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}
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static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
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struct tmio_mmc_data *pdata)
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{
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host->chan_tx = NULL;
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host->chan_rx = NULL;
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}
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static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
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{
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}
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static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
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{
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}
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#endif
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#ifdef CONFIG_PM
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int tmio_mmc_host_runtime_suspend(struct device *dev);
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int tmio_mmc_host_runtime_resume(struct device *dev);
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#endif
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static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
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{
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return readw(host->ctl + (addr << host->bus_shift));
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}
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static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
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u16 *buf, int count)
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{
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readsw(host->ctl + (addr << host->bus_shift), buf, count);
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}
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static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr)
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{
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return readw(host->ctl + (addr << host->bus_shift)) |
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readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
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}
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static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
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{
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/* If there is a hook and it returns non-zero then there
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* is an error and the write should be skipped
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*/
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if (host->write16_hook && host->write16_hook(host, addr))
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return;
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writew(val, host->ctl + (addr << host->bus_shift));
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}
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static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
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u16 *buf, int count)
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{
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writesw(host->ctl + (addr << host->bus_shift), buf, count);
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}
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static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val)
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{
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writew(val & 0xffff, host->ctl + (addr << host->bus_shift));
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writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
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}
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#endif
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