0429fbc0bd
Pull percpu consistent-ops changes from Tejun Heo: "Way back, before the current percpu allocator was implemented, static and dynamic percpu memory areas were allocated and handled separately and had their own accessors. The distinction has been gone for many years now; however, the now duplicate two sets of accessors remained with the pointer based ones - this_cpu_*() - evolving various other operations over time. During the process, we also accumulated other inconsistent operations. This pull request contains Christoph's patches to clean up the duplicate accessor situation. __get_cpu_var() uses are replaced with with this_cpu_ptr() and __this_cpu_ptr() with raw_cpu_ptr(). Unfortunately, the former sometimes is tricky thanks to C being a bit messy with the distinction between lvalues and pointers, which led to a rather ugly solution for cpumask_var_t involving the introduction of this_cpu_cpumask_var_ptr(). This converts most of the uses but not all. Christoph will follow up with the remaining conversions in this merge window and hopefully remove the obsolete accessors" * 'for-3.18-consistent-ops' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu: (38 commits) irqchip: Properly fetch the per cpu offset percpu: Resolve ambiguities in __get_cpu_var/cpumask_var_t -fix ia64: sn_nodepda cannot be assigned to after this_cpu conversion. Use __this_cpu_write. percpu: Resolve ambiguities in __get_cpu_var/cpumask_var_t Revert "powerpc: Replace __get_cpu_var uses" percpu: Remove __this_cpu_ptr clocksource: Replace __this_cpu_ptr with raw_cpu_ptr sparc: Replace __get_cpu_var uses avr32: Replace __get_cpu_var with __this_cpu_write blackfin: Replace __get_cpu_var uses tile: Use this_cpu_ptr() for hardware counters tile: Replace __get_cpu_var uses powerpc: Replace __get_cpu_var uses alpha: Replace __get_cpu_var ia64: Replace __get_cpu_var uses s390: cio driver &__get_cpu_var replacements s390: Replace __get_cpu_var uses mips: Replace __get_cpu_var uses MIPS: Replace __get_cpu_var uses in FPU emulator. arm: Replace __this_cpu_ptr with raw_cpu_ptr ...
393 lines
10 KiB
C
393 lines
10 KiB
C
/*
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* Machine check handler
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*
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* Copyright IBM Corp. 2000, 2009
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* Author(s): Ingo Adlung <adlung@de.ibm.com>,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Cornelia Huck <cornelia.huck@de.ibm.com>,
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* Heiko Carstens <heiko.carstens@de.ibm.com>,
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*/
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#include <linux/kernel_stat.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/hardirq.h>
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#include <linux/time.h>
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#include <linux/module.h>
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#include <asm/lowcore.h>
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#include <asm/smp.h>
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#include <asm/etr.h>
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#include <asm/cputime.h>
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#include <asm/nmi.h>
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#include <asm/crw.h>
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#include <asm/switch_to.h>
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struct mcck_struct {
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int kill_task;
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int channel_report;
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int warning;
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unsigned long long mcck_code;
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};
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static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
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static void s390_handle_damage(char *msg)
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{
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smp_send_stop();
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disabled_wait((unsigned long) __builtin_return_address(0));
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while (1);
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}
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/*
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* Main machine check handler function. Will be called with interrupts enabled
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* or disabled and machine checks enabled or disabled.
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*/
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void s390_handle_mcck(void)
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{
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unsigned long flags;
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struct mcck_struct mcck;
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/*
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* Disable machine checks and get the current state of accumulated
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* machine checks. Afterwards delete the old state and enable machine
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* checks again.
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*/
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local_irq_save(flags);
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local_mcck_disable();
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/*
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* Ummm... Does this make sense at all? Copying the percpu struct
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* and then zapping it one statement later?
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*/
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memcpy(&mcck, this_cpu_ptr(&cpu_mcck), sizeof(mcck));
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memset(&mcck, 0, sizeof(struct mcck_struct));
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clear_cpu_flag(CIF_MCCK_PENDING);
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local_mcck_enable();
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local_irq_restore(flags);
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if (mcck.channel_report)
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crw_handle_channel_report();
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/*
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* A warning may remain for a prolonged period on the bare iron.
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* (actually until the machine is powered off, or the problem is gone)
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* So we just stop listening for the WARNING MCH and avoid continuously
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* being interrupted. One caveat is however, that we must do this per
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* processor and cannot use the smp version of ctl_clear_bit().
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* On VM we only get one interrupt per virtally presented machinecheck.
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* Though one suffices, we may get one interrupt per (virtual) cpu.
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*/
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if (mcck.warning) { /* WARNING pending ? */
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static int mchchk_wng_posted = 0;
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/* Use single cpu clear, as we cannot handle smp here. */
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__ctl_clear_bit(14, 24); /* Disable WARNING MCH */
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if (xchg(&mchchk_wng_posted, 1) == 0)
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kill_cad_pid(SIGPWR, 1);
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}
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if (mcck.kill_task) {
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local_irq_enable();
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printk(KERN_EMERG "mcck: Terminating task because of machine "
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"malfunction (code 0x%016llx).\n", mcck.mcck_code);
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printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
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current->comm, current->pid);
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do_exit(SIGSEGV);
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}
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}
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EXPORT_SYMBOL_GPL(s390_handle_mcck);
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/*
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* returns 0 if all registers could be validated
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* returns 1 otherwise
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*/
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static int notrace s390_revalidate_registers(struct mci *mci)
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{
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int kill_task;
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u64 zero;
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void *fpt_save_area, *fpt_creg_save_area;
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kill_task = 0;
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zero = 0;
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if (!mci->gr) {
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/*
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* General purpose registers couldn't be restored and have
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* unknown contents. Process needs to be terminated.
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*/
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kill_task = 1;
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}
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if (!mci->fp) {
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/*
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* Floating point registers can't be restored and
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* therefore the process needs to be terminated.
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*/
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kill_task = 1;
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}
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#ifndef CONFIG_64BIT
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asm volatile(
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" ld 0,0(%0)\n"
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" ld 2,8(%0)\n"
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" ld 4,16(%0)\n"
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" ld 6,24(%0)"
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: : "a" (&S390_lowcore.floating_pt_save_area));
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#endif
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if (MACHINE_HAS_IEEE) {
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#ifdef CONFIG_64BIT
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fpt_save_area = &S390_lowcore.floating_pt_save_area;
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fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area;
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#else
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fpt_save_area = (void *) S390_lowcore.extended_save_area_addr;
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fpt_creg_save_area = fpt_save_area + 128;
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#endif
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if (!mci->fc) {
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/*
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* Floating point control register can't be restored.
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* Task will be terminated.
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*/
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asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
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kill_task = 1;
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} else
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asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area));
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asm volatile(
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" ld 0,0(%0)\n"
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" ld 1,8(%0)\n"
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" ld 2,16(%0)\n"
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" ld 3,24(%0)\n"
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" ld 4,32(%0)\n"
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" ld 5,40(%0)\n"
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" ld 6,48(%0)\n"
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" ld 7,56(%0)\n"
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" ld 8,64(%0)\n"
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" ld 9,72(%0)\n"
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" ld 10,80(%0)\n"
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" ld 11,88(%0)\n"
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" ld 12,96(%0)\n"
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" ld 13,104(%0)\n"
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" ld 14,112(%0)\n"
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" ld 15,120(%0)\n"
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: : "a" (fpt_save_area));
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}
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#ifdef CONFIG_64BIT
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/* Revalidate vector registers */
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if (MACHINE_HAS_VX && current->thread.vxrs) {
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if (!mci->vr) {
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/*
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* Vector registers can't be restored and therefore
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* the process needs to be terminated.
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*/
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kill_task = 1;
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}
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restore_vx_regs((__vector128 *)
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S390_lowcore.vector_save_area_addr);
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}
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#endif
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/* Revalidate access registers */
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asm volatile(
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" lam 0,15,0(%0)"
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: : "a" (&S390_lowcore.access_regs_save_area));
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if (!mci->ar) {
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/*
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* Access registers have unknown contents.
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* Terminating task.
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*/
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kill_task = 1;
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}
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/* Revalidate control registers */
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if (!mci->cr) {
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/*
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* Control registers have unknown contents.
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* Can't recover and therefore stopping machine.
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*/
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s390_handle_damage("invalid control registers.");
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} else {
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#ifdef CONFIG_64BIT
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asm volatile(
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" lctlg 0,15,0(%0)"
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: : "a" (&S390_lowcore.cregs_save_area));
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#else
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asm volatile(
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" lctl 0,15,0(%0)"
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: : "a" (&S390_lowcore.cregs_save_area));
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#endif
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}
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/*
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* We don't even try to revalidate the TOD register, since we simply
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* can't write something sensible into that register.
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*/
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#ifdef CONFIG_64BIT
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/*
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* See if we can revalidate the TOD programmable register with its
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* old contents (should be zero) otherwise set it to zero.
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*/
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if (!mci->pr)
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asm volatile(
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" sr 0,0\n"
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" sckpf"
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: : : "0", "cc");
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else
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asm volatile(
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" l 0,0(%0)\n"
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" sckpf"
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: : "a" (&S390_lowcore.tod_progreg_save_area)
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: "0", "cc");
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#endif
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/* Revalidate clock comparator register */
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set_clock_comparator(S390_lowcore.clock_comparator);
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/* Check if old PSW is valid */
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if (!mci->wp)
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/*
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* Can't tell if we come from user or kernel mode
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* -> stopping machine.
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*/
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s390_handle_damage("old psw invalid.");
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if (!mci->ms || !mci->pm || !mci->ia)
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kill_task = 1;
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return kill_task;
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}
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#define MAX_IPD_COUNT 29
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#define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */
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#define ED_STP_ISLAND 6 /* External damage STP island check */
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#define ED_STP_SYNC 7 /* External damage STP sync check */
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#define ED_ETR_SYNC 12 /* External damage ETR sync check */
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#define ED_ETR_SWITCH 13 /* External damage ETR switch to local */
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/*
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* machine check handler.
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*/
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void notrace s390_do_machine_check(struct pt_regs *regs)
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{
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static int ipd_count;
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static DEFINE_SPINLOCK(ipd_lock);
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static unsigned long long last_ipd;
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struct mcck_struct *mcck;
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unsigned long long tmp;
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struct mci *mci;
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int umode;
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nmi_enter();
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inc_irq_stat(NMI_NMI);
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mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
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mcck = this_cpu_ptr(&cpu_mcck);
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umode = user_mode(regs);
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if (mci->sd) {
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/* System damage -> stopping machine */
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s390_handle_damage("received system damage machine check.");
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}
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if (mci->pd) {
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if (mci->b) {
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/* Processing backup -> verify if we can survive this */
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u64 z_mcic, o_mcic, t_mcic;
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#ifdef CONFIG_64BIT
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z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
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o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
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1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
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1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
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1ULL<<16);
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#else
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z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 |
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1ULL<<29);
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o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
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1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
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1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16);
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#endif
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t_mcic = *(u64 *)mci;
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if (((t_mcic & z_mcic) != 0) ||
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((t_mcic & o_mcic) != o_mcic)) {
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s390_handle_damage("processing backup machine "
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"check with damage.");
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}
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/*
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* Nullifying exigent condition, therefore we might
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* retry this instruction.
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*/
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spin_lock(&ipd_lock);
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tmp = get_tod_clock();
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if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
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ipd_count++;
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else
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ipd_count = 1;
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last_ipd = tmp;
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if (ipd_count == MAX_IPD_COUNT)
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s390_handle_damage("too many ipd retries.");
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spin_unlock(&ipd_lock);
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} else {
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/* Processing damage -> stopping machine */
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s390_handle_damage("received instruction processing "
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"damage machine check.");
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}
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}
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if (s390_revalidate_registers(mci)) {
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if (umode) {
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/*
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* Couldn't restore all register contents while in
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* user mode -> mark task for termination.
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*/
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mcck->kill_task = 1;
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mcck->mcck_code = *(unsigned long long *) mci;
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set_cpu_flag(CIF_MCCK_PENDING);
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} else {
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/*
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* Couldn't restore all register contents while in
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* kernel mode -> stopping machine.
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*/
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s390_handle_damage("unable to revalidate registers.");
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}
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}
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if (mci->cd) {
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/* Timing facility damage */
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s390_handle_damage("TOD clock damaged");
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}
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if (mci->ed && mci->ec) {
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/* External damage */
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if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC))
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etr_sync_check();
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if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH))
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etr_switch_to_local();
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if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
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stp_sync_check();
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if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
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stp_island_check();
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}
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if (mci->se)
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/* Storage error uncorrected */
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s390_handle_damage("received storage error uncorrected "
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"machine check.");
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if (mci->ke)
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/* Storage key-error uncorrected */
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s390_handle_damage("received storage key-error uncorrected "
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"machine check.");
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if (mci->ds && mci->fa)
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/* Storage degradation */
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s390_handle_damage("received storage degradation machine "
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"check.");
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if (mci->cp) {
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/* Channel report word pending */
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mcck->channel_report = 1;
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set_cpu_flag(CIF_MCCK_PENDING);
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}
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if (mci->w) {
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/* Warning pending */
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mcck->warning = 1;
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set_cpu_flag(CIF_MCCK_PENDING);
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}
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nmi_exit();
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}
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static int __init machine_check_init(void)
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{
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ctl_set_bit(14, 25); /* enable external damage MCH */
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ctl_set_bit(14, 27); /* enable system recovery MCH */
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ctl_set_bit(14, 24); /* enable warning MCH */
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return 0;
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}
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arch_initcall(machine_check_init);
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