10d9eb8a17
When processors are about to hit low power states, the assertion of standbywfi signal, triggered by the wfi instruction, is essential to entering low power modes. If an IRQ is pending on the processor at the time wfi is issued, the wfi instruction completes and the processor restarts execution without asserting the standbywfi signal. Depending on the platform power controller HW this behaviour can be acceptable or not; if this behaviour must be prevented software should be provided with a way to disable the routing of interrupts to the core IRQ pins. On systems where raw GIC distributor interrupts are connected to the power controller as wake-up events (hence the power controller still senses IRQs and can wake up cores upon IRQ pending), the GIC CPU interface can be disabled on power down, so that the GIC CPU IF output is gated and wfi cannot complete, thereby preventing the standbywfi issue. This patch adds a simple function to the GIC driver that allows to disable the GIC CPU IF from power down procedures. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [rewrote commit log] Signed-off-by: Olof Johansson <olof@lixom.net> |
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| .. | ||
| arm-gic.h | ||
| arm-vic.h | ||
| bcm2835.h | ||
| chained_irq.h | ||
| metag-ext.h | ||
| metag.h | ||
| mxs.h | ||
| spear-shirq.h | ||
| versatile-fpga.h | ||