525d4015e6
Current vexpress smp init code detects whether to override the default smp ops with MCPM smp ops by matching the "cci-400" compatible string, in that MCPM requires control over CCI ports to manage low-power states entry/exit. The "cci-400" compatible string check is a necessary but not sufficient condition for MCPM to work, because the cci-400 can be made visible to the kernel, but firmware can nonetheless disable non-secure CCI ports control, while still allowing PMU access; if booted in non-secure world, the kernel would still blindly override smp operations with MCPM operations, resulting in kernel faults when the CCI ports programming interface is accessed from non-secure world. This means that the "cci-400" compatible string check would result in a false positive in systems that eg boot in HYP mode, where CCI ports non-secure access is explicitly not allowed, and it is reported in the respective device tree nodes with CCI ports marked as disabled. Refactor the smp operations initialization to make sure that the kernel is actually allowed to take control over CCI ports (by enabling MCPM smp operations) before overriding default vexpress smp operations. Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Jon Medhurst <tixy@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
93 lines
2.3 KiB
C
93 lines
2.3 KiB
C
/*
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* linux/arch/arm/mach-vexpress/platsmp.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <linux/of_address.h>
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#include <linux/vexpress.h>
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#include <asm/mcpm.h>
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#include <asm/smp_scu.h>
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#include <asm/mach/map.h>
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#include <plat/platsmp.h>
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#include "core.h"
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bool __init vexpress_smp_init_ops(void)
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{
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#ifdef CONFIG_MCPM
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int cpu;
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struct device_node *cpu_node, *cci_node;
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/*
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* The best way to detect a multi-cluster configuration
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* is to detect if the kernel can take over CCI ports
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* control. Loop over possible CPUs and check if CCI
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* port control is available.
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* Override the default vexpress_smp_ops if so.
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*/
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for_each_possible_cpu(cpu) {
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bool available;
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cpu_node = of_get_cpu_node(cpu, NULL);
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if (WARN(!cpu_node, "Missing cpu device node!"))
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return false;
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cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0);
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available = cci_node && of_device_is_available(cci_node);
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of_node_put(cci_node);
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of_node_put(cpu_node);
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if (!available)
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return false;
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}
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mcpm_smp_set_ops();
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return true;
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#else
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return false;
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#endif
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}
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static const struct of_device_id vexpress_smp_dt_scu_match[] __initconst = {
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{ .compatible = "arm,cortex-a5-scu", },
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{ .compatible = "arm,cortex-a9-scu", },
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{}
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};
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static void __init vexpress_smp_dt_prepare_cpus(unsigned int max_cpus)
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{
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struct device_node *scu = of_find_matching_node(NULL,
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vexpress_smp_dt_scu_match);
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if (scu)
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scu_enable(of_iomap(scu, 0));
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/*
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* Write the address of secondary startup into the
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* system-wide flags register. The boot monitor waits
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* until it receives a soft interrupt, and then the
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* secondary CPU branches to this address.
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*/
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vexpress_flags_set(virt_to_phys(versatile_secondary_startup));
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}
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const struct smp_operations vexpress_smp_dt_ops __initconst = {
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.smp_prepare_cpus = vexpress_smp_dt_prepare_cpus,
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.smp_secondary_init = versatile_secondary_init,
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.smp_boot_secondary = versatile_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = vexpress_cpu_die,
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#endif
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};
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