23ed8d57f3
mask/unmask_msi_irq and __mask_msi/msix_irq are PCI/MSI specific functions and should be named accordingly. This is a preparatory patch to support MSI on non PCI devices. Rename mask/unmask_msi_irq to pci_msi_mask/unmask_irq and document the functions. Provide conversion helpers. Rename __mask_msi/msix_irq to __pci_msi/msix_desc_mask so its clear that they operated on msi_desc. Fixup the only user outside of pci/msi. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
99 lines
2.8 KiB
C
99 lines
2.8 KiB
C
#ifndef LINUX_MSI_H
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#define LINUX_MSI_H
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#include <linux/kobject.h>
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#include <linux/list.h>
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struct msi_msg {
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u32 address_lo; /* low 32 bits of msi message address */
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u32 address_hi; /* high 32 bits of msi message address */
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u32 data; /* 16 bits of msi message data */
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};
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extern int pci_msi_ignore_mask;
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/* Helper functions */
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struct irq_data;
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struct msi_desc;
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void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
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struct msi_desc {
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struct {
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__u8 is_msix : 1;
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__u8 multiple: 3; /* log2 num of messages allocated */
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__u8 multi_cap : 3; /* log2 num of messages supported */
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__u8 maskbit : 1; /* mask-pending bit supported ? */
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__u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
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__u16 entry_nr; /* specific enabled entry */
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unsigned default_irq; /* default pre-assigned irq */
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} msi_attrib;
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u32 masked; /* mask bits */
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unsigned int irq;
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unsigned int nvec_used; /* number of messages */
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struct list_head list;
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union {
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void __iomem *mask_base;
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u8 mask_pos;
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};
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struct pci_dev *dev;
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/* Last set MSI message */
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struct msi_msg msg;
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};
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void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
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u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
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u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
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void pci_msi_mask_irq(struct irq_data *data);
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void pci_msi_unmask_irq(struct irq_data *data);
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/* Conversion helpers. Should be removed after merging */
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static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
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{
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__pci_write_msi_msg(entry, msg);
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}
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static inline void write_msi_msg(int irq, struct msi_msg *msg)
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{
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pci_write_msi_msg(irq, msg);
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}
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static inline void mask_msi_irq(struct irq_data *data)
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{
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pci_msi_mask_irq(data);
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}
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static inline void unmask_msi_irq(struct irq_data *data)
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{
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pci_msi_unmask_irq(data);
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}
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/*
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* The arch hooks to setup up msi irqs. Those functions are
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* implemented as weak symbols so that they /can/ be overriden by
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* architecture specific code if needed.
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*/
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int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
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void arch_teardown_msi_irq(unsigned int irq);
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int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
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void arch_teardown_msi_irqs(struct pci_dev *dev);
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void arch_restore_msi_irqs(struct pci_dev *dev);
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void default_teardown_msi_irqs(struct pci_dev *dev);
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void default_restore_msi_irqs(struct pci_dev *dev);
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struct msi_controller {
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struct module *owner;
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struct device *dev;
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struct device_node *of_node;
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struct list_head list;
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int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
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struct msi_desc *desc);
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void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
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};
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#endif /* LINUX_MSI_H */
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