Andre Przywara 266068eabb KVM: arm/arm64: vgic-v2: Limit ITARGETSR bits to number of VCPUs ... The GICv2 spec says in section 4.3.12 that a "CPU targets field bit that corresponds to an unimplemented CPU interface is RAZ/WI." Currently we allow the guest to write any value in there and it can read that back. Mask the written value with the proper CPU mask to be spec compliant. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		2016-12-09 15:46:59 +00:00
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kvm	KVM: arm/arm64: vgic-v2: Limit ITARGETSR bits to number of VCPUs	2016-12-09 15:46:59 +00:00
lib	irqbypass: Disallow NULL token	2016-05-11 22:37:54 +02:00
Makefile	virt: Add virt directory to the top Makefile	2015-10-01 15:06:44 +02:00