4d3d0e4272
The Aspeed SoCs typically provide more than 200 pins for GPIO and other functions. The signal enabled on a pin is determined on a priority basis, where a given pin can provide a number of different signal types. In addition to the priority levels, the Aspeed pin controllers describe the signal active on a pin by compound logical expressions involving multiple operators, registers and bits. Some difficulty arises as a pin's function bit masks for each priority level are frequently not the same (i.e. we cannot just flip a bit to change from a high to low priority signal), or even in the same register(s). Some configuration bits affect multiple pins, while in other cases the signals for a bus must each be enabled individually. Together, these features give rise to some complexity in the implementation. A more complete description of the complexities is provided in the associated header file. The patch doesn't implement pinctrl/pinmux/pinconf for any particular Aspeed SoC, rather it adds the framework for defining pinmux configurations. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
57 lines
2.2 KiB
Makefile
57 lines
2.2 KiB
Makefile
# generic pinmux support
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subdir-ccflags-$(CONFIG_DEBUG_PINCTRL) += -DDEBUG
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obj-y += core.o pinctrl-utils.o
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obj-$(CONFIG_PINMUX) += pinmux.o
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obj-$(CONFIG_PINCONF) += pinconf.o
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obj-$(CONFIG_OF) += devicetree.o
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obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o
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obj-$(CONFIG_PINCTRL_ADI2) += pinctrl-adi2.o
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obj-$(CONFIG_PINCTRL_AS3722) += pinctrl-as3722.o
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obj-$(CONFIG_PINCTRL_BF54x) += pinctrl-adi2-bf54x.o
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obj-$(CONFIG_PINCTRL_BF60x) += pinctrl-adi2-bf60x.o
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obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
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obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
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obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o
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obj-$(CONFIG_PINCTRL_DIGICOLOR) += pinctrl-digicolor.o
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obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o
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obj-$(CONFIG_PINCTRL_MAX77620) += pinctrl-max77620.o
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obj-$(CONFIG_PINCTRL_MESON) += meson/
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obj-$(CONFIG_PINCTRL_OXNAS) += pinctrl-oxnas.o
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obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o
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obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o
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obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
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obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
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obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
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obj-$(CONFIG_PINCTRL_SIRF) += sirf/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_PINCTRL_TZ1090) += pinctrl-tz1090.o
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obj-$(CONFIG_PINCTRL_TZ1090_PDC) += pinctrl-tz1090-pdc.o
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obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
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obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
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obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o
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obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
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obj-$(CONFIG_PINCTRL_LPC18XX) += pinctrl-lpc18xx.o
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obj-$(CONFIG_PINCTRL_TB10X) += pinctrl-tb10x.o
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obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.o
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obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-y += bcm/
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obj-$(CONFIG_PINCTRL_BERLIN) += berlin/
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obj-y += freescale/
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obj-$(CONFIG_X86) += intel/
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obj-$(CONFIG_PINCTRL_MVEBU) += mvebu/
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obj-y += nomadik/
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obj-$(CONFIG_PINCTRL_PXA) += pxa/
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obj-$(CONFIG_ARCH_QCOM) += qcom/
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obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
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obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc/
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obj-$(CONFIG_PINCTRL_SPEAR) += spear/
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obj-$(CONFIG_PINCTRL_STM32) += stm32/
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obj-$(CONFIG_PINCTRL_SUNXI) += sunxi/
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obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
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obj-$(CONFIG_ARCH_VT8500) += vt8500/
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obj-$(CONFIG_PINCTRL_MTK) += mediatek/
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