209 lines
5.4 KiB
C
209 lines
5.4 KiB
C
/**
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* gadget.h - Cadence USB3 device Controller Core file
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*
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* Copyright (C) 2016 Cadence Design Systems - http://www.cadence.com
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* Copyright 2017 NXP
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*
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* Authors: Pawel Jez <pjez@cadence.com>,
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* Konrad Kociolek <konrad@cadence.com>,
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* Peter Chen <peter.chen@nxp.com>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef __DRIVERS_CDNS3_GADGET
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#define __DRIVERS_CDNS3_GADGET
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#include "dev-regs-map.h"
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#if IS_ENABLED(CONFIG_USB_CDNS_MISC)
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#include "cdns_misc.h"
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#endif
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#define gadget_to_usb_ss(g) \
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(container_of(g, struct usb_ss_dev, gadget))
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#define to_usb_ss_ep(ep) \
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(container_of(ep, struct usb_ss_endpoint, endpoint))
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#define ep_to_usb_ss_ep(ep) \
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(container_of(ep, struct usb_ss_endpoint, endpoint))
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/*-------------------------------------------------------------------------*/
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/* TRB macros */
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/* Common TRB fields */
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#define TRB_SET_CYCLE_BIT 1uL
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#define TRB_SET_CHAIN_BIT 0x10
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/* offset 0 */
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#define TRB_DATA_BUFFER_POINTER_MASK 0xFFFFFFFF
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#define TRB_SET_DATA_BUFFER_POINTER(p) (p & TRB_DATA_BUFFER_POINTER_MASK)
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/* offset 4 */
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#define TRB_TRANSFER_LENGTH_MASK 0x1FFFF
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#define TRB_SET_TRANSFER_LENGTH(l) (l & TRB_TRANSFER_LENGTH_MASK)
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#define TRB_BURST_LENGTH_MASK 0xFF
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#define TRB_SET_BURST_LENGTH(l) ((l & TRB_BURST_LENGTH_MASK) << 24)
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/* offset 8 */
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#define TRB_SET_INT_ON_SHORT_PACKET 0x04
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#define TRB_SET_FIFO_MODE 0x08
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#define TRB_SET_INT_ON_COMPLETION 0x20
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#define TRB_TYPE_NORMAL 0x400
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#define TRB_STREAM_ID_MASK 0xFFFF
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#define TRB_SET_STREAM_ID(sid) ((sid & TRB_STREAM_ID_MASK) << 16)
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/*-------------------------------------------------------------------------*/
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/* Driver numeric constants */
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#define DEVICE_ADDRESS_MAX 127
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/* Endpoint init values */
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#define ENDPOINT_MAX_PACKET_LIMIT 1024
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#define ENDPOINT_MAX_STREAMS 15
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#define ENDPOINT0_MAX_PACKET_LIMIT 512
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/* All endpoints except EP0 */
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#define USB_SS_ENDPOINTS_MAX_COUNT 30
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#define USB_SS_TRBS_NUM 32
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/* Standby mode */
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#define STB_CLK_SWITCH_DONE_MASK 0x200
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#define STB_CLK_SWITCH_EN_MASK 0x100
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#define STB_CLK_SWITCH_EN_SHIFT 8
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#define ENDPOINT_MAX_PACKET_SIZE_0 0
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#define ENDPOINT_MAX_PACKET_SIZE_8 8
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#define ENDPOINT_MAX_PACKET_SIZE_64 64
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#define ENDPOINT_MAX_PACKET_SIZE_512 512
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#define ENDPOINT_MAX_PACKET_SIZE_1023 1023
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#define ENDPOINT_MAX_PACKET_SIZE_1024 1024
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#define SS_LINK_STATE_U3 3
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#define FSHS_LPM_STATE_L2 2
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#define ADDR_MODULO_8 8
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#define INTERRUPT_MASK 0xFFFFFFFF
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#define ACTUAL_TRANSFERRED_BYTES_MASK 0x1FFFF
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#define ENDPOINT_DIR_MASK 0x80
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/*-------------------------------------------------------------------------*/
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/**
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* IS_REG_REQUIRING_ACTIVE_REF_CLOCK - Macro checks if desired
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* register requires active clock, it involves such registers as:
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* EP_CFG, EP_TR_ADDR, EP_CMD, EP_SEL, USB_CONF
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* @usb_ss: extended gadget object
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* @reg: register address
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*/
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#define IS_REG_REQUIRING_ACTIVE_REF_CLOCK(usb_ss, reg) (!reg || \
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(reg >= &usb_ss->regs->ep_sel && reg <= &usb_ss->regs->ep_cmd))
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/**
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* CAST_EP_REG_POS_TO_INDEX - Macro converts bit position of ep_ists register to
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* index of endpoint object in usb_ss_dev.eps[] container
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* @i: bit position of endpoint for which endpoint object is required
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*
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* Remember that endpoint container doesn't contain default endpoint
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*/
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#define CAST_EP_REG_POS_TO_INDEX(i) (((i) / 16) + ((((i) % 16) - 2) * 2))
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/**
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* CAST_EP_ADDR_TO_INDEX - Macro converts endpoint address to
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* index of endpoint object in usb_ss_dev.eps[] container
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* @ep_addr: endpoint address for which endpoint object is required
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*
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* Remember that endpoint container doesn't contain default endpoint
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*/
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#define CAST_EP_ADDR_TO_INDEX(ep_addr) \
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(((ep_addr & 0x7F) - 1) + ((ep_addr & 0x80) ? 1 : 0))
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/**
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* CAST_EP_ADDR_TO_BIT_POS - Macro converts endpoint address to
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* bit position in ep_ists register
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* @ep_addr: endpoint address for which bit position is required
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*
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* Remember that endpoint container doesn't contain default endpoint
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*/
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#define CAST_EP_ADDR_TO_BIT_POS(ep_addr) \
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(((uint32_t)1 << (ep_addr & 0x7F)) << ((ep_addr & 0x80) ? 16 : 0))
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#define CAST_INDEX_TO_EP_ADDR(index) \
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((index / 2 + 1) | ((index % 2) ? 0x80 : 0x00))
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/*-------------------------------------------------------------------------*/
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/* Used structs */
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struct usb_ss_trb {
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u32 offset0;
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u32 offset4;
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u32 offset8;
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};
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struct usb_ss_dev;
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struct usb_ss_endpoint {
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struct usb_ep endpoint;
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struct list_head request_list;
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struct usb_ss_trb *trb_pool;
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dma_addr_t trb_pool_dma;
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struct usb_ss_dev *usb_ss;
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char name[20];
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int hw_pending_flag;
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int stalled_flag;
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int is_iso_flag;
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int wedge_flag;
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void *cpu_addr;
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dma_addr_t dma_addr;
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};
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struct usb_ss_dev {
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struct device dev;
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struct usbss_dev_register_block_type __iomem *regs;
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struct usb_gadget gadget;
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struct usb_gadget_driver *gadget_driver;
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dma_addr_t setup_dma;
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dma_addr_t trb_ep0_dma;
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u32 *trb_ep0;
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u8 *setup;
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struct usb_ss_endpoint *eps[USB_SS_ENDPOINTS_MAX_COUNT];
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int ep_nums;
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struct usb_request *actual_ep0_request;
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int ep0_data_dir;
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int hw_configured_flag;
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int wake_up_flag;
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u16 isoch_delay;
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spinlock_t lock;
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unsigned is_connected:1;
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unsigned in_standby_mode:1;
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u32 usb_ien;
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u32 ep_ien;
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int setup_pending;
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struct device *sysdev;
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bool start_gadget; /* The device mode is enabled */
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};
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#endif /* __DRIVERS_CDNS3_GADGET */
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