![Vivek Gautam](/assets/img/avatar_default.png)
DWC3 controller on Exynos7 SoC has separate control for AXI UpScaler which connects DWC3 DRD controller to AXI bus. Get the gate clock for the same to control it across power cycles. Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
302 lines
6.9 KiB
C
302 lines
6.9 KiB
C
/**
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* dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 of
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* the License as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/clk.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/usb_phy_generic.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/regulator/consumer.h>
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struct dwc3_exynos {
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struct platform_device *usb2_phy;
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struct platform_device *usb3_phy;
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struct device *dev;
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struct clk *clk;
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struct clk *susp_clk;
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struct clk *axius_clk;
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struct regulator *vdd33;
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struct regulator *vdd10;
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};
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static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
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{
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struct usb_phy_generic_platform_data pdata;
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struct platform_device *pdev;
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int ret;
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memset(&pdata, 0x00, sizeof(pdata));
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pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO);
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if (!pdev)
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return -ENOMEM;
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exynos->usb2_phy = pdev;
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pdata.type = USB_PHY_TYPE_USB2;
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pdata.gpio_reset = -1;
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ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata));
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if (ret)
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goto err1;
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pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO);
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if (!pdev) {
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ret = -ENOMEM;
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goto err1;
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}
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exynos->usb3_phy = pdev;
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pdata.type = USB_PHY_TYPE_USB3;
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ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata));
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if (ret)
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goto err2;
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ret = platform_device_add(exynos->usb2_phy);
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if (ret)
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goto err2;
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ret = platform_device_add(exynos->usb3_phy);
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if (ret)
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goto err3;
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return 0;
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err3:
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platform_device_del(exynos->usb2_phy);
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err2:
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platform_device_put(exynos->usb3_phy);
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err1:
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platform_device_put(exynos->usb2_phy);
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return ret;
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}
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static int dwc3_exynos_remove_child(struct device *dev, void *unused)
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{
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struct platform_device *pdev = to_platform_device(dev);
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platform_device_unregister(pdev);
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return 0;
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}
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static int dwc3_exynos_probe(struct platform_device *pdev)
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{
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struct dwc3_exynos *exynos;
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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int ret;
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exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
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if (!exynos)
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return -ENOMEM;
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/*
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* Right now device-tree probed devices don't get dma_mask set.
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* Since shared usb code relies on it, set it here for now.
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* Once we move to full device tree support this will vanish off.
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*/
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ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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platform_set_drvdata(pdev, exynos);
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ret = dwc3_exynos_register_phys(exynos);
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if (ret) {
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dev_err(dev, "couldn't register PHYs\n");
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return ret;
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}
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exynos->dev = dev;
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exynos->clk = devm_clk_get(dev, "usbdrd30");
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if (IS_ERR(exynos->clk)) {
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dev_err(dev, "couldn't get clock\n");
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return -EINVAL;
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}
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clk_prepare_enable(exynos->clk);
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exynos->susp_clk = devm_clk_get(dev, "usbdrd30_susp_clk");
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if (IS_ERR(exynos->susp_clk)) {
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dev_dbg(dev, "no suspend clk specified\n");
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exynos->susp_clk = NULL;
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}
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clk_prepare_enable(exynos->susp_clk);
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if (of_device_is_compatible(node, "samsung,exynos7-dwusb3")) {
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exynos->axius_clk = devm_clk_get(dev, "usbdrd30_axius_clk");
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if (IS_ERR(exynos->axius_clk)) {
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dev_err(dev, "no AXI UpScaler clk specified\n");
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return -ENODEV;
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}
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clk_prepare_enable(exynos->axius_clk);
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} else {
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exynos->axius_clk = NULL;
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}
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exynos->vdd33 = devm_regulator_get(dev, "vdd33");
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if (IS_ERR(exynos->vdd33)) {
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ret = PTR_ERR(exynos->vdd33);
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goto err2;
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}
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ret = regulator_enable(exynos->vdd33);
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if (ret) {
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dev_err(dev, "Failed to enable VDD33 supply\n");
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goto err2;
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}
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exynos->vdd10 = devm_regulator_get(dev, "vdd10");
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if (IS_ERR(exynos->vdd10)) {
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ret = PTR_ERR(exynos->vdd10);
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goto err3;
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}
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ret = regulator_enable(exynos->vdd10);
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if (ret) {
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dev_err(dev, "Failed to enable VDD10 supply\n");
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goto err3;
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}
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if (node) {
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ret = of_platform_populate(node, NULL, NULL, dev);
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if (ret) {
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dev_err(dev, "failed to add dwc3 core\n");
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goto err4;
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}
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} else {
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dev_err(dev, "no device node, failed to add dwc3 core\n");
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ret = -ENODEV;
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goto err4;
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}
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return 0;
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err4:
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regulator_disable(exynos->vdd10);
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err3:
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regulator_disable(exynos->vdd33);
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err2:
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clk_disable_unprepare(exynos->axius_clk);
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clk_disable_unprepare(exynos->susp_clk);
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clk_disable_unprepare(exynos->clk);
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return ret;
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}
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static int dwc3_exynos_remove(struct platform_device *pdev)
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{
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struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
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device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child);
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platform_device_unregister(exynos->usb2_phy);
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platform_device_unregister(exynos->usb3_phy);
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clk_disable_unprepare(exynos->axius_clk);
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clk_disable_unprepare(exynos->susp_clk);
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clk_disable_unprepare(exynos->clk);
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regulator_disable(exynos->vdd33);
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regulator_disable(exynos->vdd10);
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return 0;
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}
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static const struct of_device_id exynos_dwc3_match[] = {
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{ .compatible = "samsung,exynos5250-dwusb3" },
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{ .compatible = "samsung,exynos7-dwusb3" },
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{},
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};
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MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
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#ifdef CONFIG_PM_SLEEP
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static int dwc3_exynos_suspend(struct device *dev)
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{
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struct dwc3_exynos *exynos = dev_get_drvdata(dev);
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clk_disable(exynos->axius_clk);
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clk_disable(exynos->clk);
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regulator_disable(exynos->vdd33);
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regulator_disable(exynos->vdd10);
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return 0;
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}
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static int dwc3_exynos_resume(struct device *dev)
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{
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struct dwc3_exynos *exynos = dev_get_drvdata(dev);
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int ret;
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ret = regulator_enable(exynos->vdd33);
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if (ret) {
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dev_err(dev, "Failed to enable VDD33 supply\n");
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return ret;
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}
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ret = regulator_enable(exynos->vdd10);
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if (ret) {
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dev_err(dev, "Failed to enable VDD10 supply\n");
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return ret;
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}
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clk_enable(exynos->clk);
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clk_enable(exynos->axius_clk);
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/* runtime set active to reflect active state. */
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pm_runtime_disable(dev);
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pm_runtime_set_active(dev);
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pm_runtime_enable(dev);
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return 0;
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}
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static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume)
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};
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#define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops)
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#else
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#define DEV_PM_OPS NULL
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#endif /* CONFIG_PM_SLEEP */
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static struct platform_driver dwc3_exynos_driver = {
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.probe = dwc3_exynos_probe,
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.remove = dwc3_exynos_remove,
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.driver = {
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.name = "exynos-dwc3",
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.of_match_table = exynos_dwc3_match,
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.pm = DEV_PM_OPS,
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},
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};
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module_platform_driver(dwc3_exynos_driver);
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MODULE_ALIAS("platform:exynos-dwc3");
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MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");
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