![Jiang Liu](/assets/img/avatar_default.png)
Introduce a global rwsem dmar_global_lock, which will be used to protect DMAR related global data structures from DMAR/PCI/memory device hotplug operations in process context. DMA and interrupt remapping related data structures are read most, and only change when memory/PCI/DMAR hotplug event happens. So a global rwsem solution is adopted for balance between simplicity and performance. For interrupt remapping driver, function intel_irq_remapping_supported(), dmar_table_init(), intel_enable_irq_remapping(), disable_irq_remapping(), reenable_irq_remapping() and enable_drhd_fault_handling() etc are called during booting, suspending and resuming with interrupt disabled, so no need to take the global lock. For interrupt remapping entry allocation, the locking model is: down_read(&dmar_global_lock); /* Find corresponding iommu */ iommu = map_hpet_to_ir(id); if (iommu) /* * Allocate remapping entry and mark entry busy, * the IOMMU won't be hot-removed until the * allocated entry has been released. */ index = alloc_irte(iommu, irq, 1); up_read(&dmar_global_lock); For DMA remmaping driver, we only uses the dmar_global_lock rwsem to protect functions which are only called in process context. For any function which may be called in interrupt context, we will use RCU to protect them in following patches. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
171 lines
4.5 KiB
C
171 lines
4.5 KiB
C
/*
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* Copyright (c) 2006, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*
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* Copyright (C) Ashok Raj <ashok.raj@intel.com>
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* Copyright (C) Shaohua Li <shaohua.li@intel.com>
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*/
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#ifndef __DMAR_H__
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#define __DMAR_H__
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#include <linux/acpi.h>
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#include <linux/types.h>
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#include <linux/msi.h>
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#include <linux/irqreturn.h>
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#include <linux/rwsem.h>
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struct acpi_dmar_header;
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/* DMAR Flags */
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#define DMAR_INTR_REMAP 0x1
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#define DMAR_X2APIC_OPT_OUT 0x2
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struct intel_iommu;
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#ifdef CONFIG_DMAR_TABLE
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extern struct acpi_table_header *dmar_tbl;
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struct dmar_drhd_unit {
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struct list_head list; /* list of drhd units */
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struct acpi_dmar_header *hdr; /* ACPI header */
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u64 reg_base_addr; /* register base address*/
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struct pci_dev **devices; /* target device array */
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int devices_cnt; /* target device count */
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u16 segment; /* PCI domain */
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u8 ignored:1; /* ignore drhd */
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u8 include_all:1;
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struct intel_iommu *iommu;
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};
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extern struct rw_semaphore dmar_global_lock;
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extern struct list_head dmar_drhd_units;
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#define for_each_drhd_unit(drhd) \
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list_for_each_entry(drhd, &dmar_drhd_units, list)
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#define for_each_active_drhd_unit(drhd) \
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list_for_each_entry(drhd, &dmar_drhd_units, list) \
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if (drhd->ignored) {} else
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#define for_each_active_iommu(i, drhd) \
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list_for_each_entry(drhd, &dmar_drhd_units, list) \
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if (i=drhd->iommu, drhd->ignored) {} else
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#define for_each_iommu(i, drhd) \
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list_for_each_entry(drhd, &dmar_drhd_units, list) \
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if (i=drhd->iommu, 0) {} else
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#define for_each_dev_scope(a, c, p, d) \
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for ((p) = 0; ((d) = (p) < (c) ? (a)[(p)] : NULL, (p) < (c)); (p)++)
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#define for_each_active_dev_scope(a, c, p, d) \
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for_each_dev_scope((a), (c), (p), (d)) if (!(d)) { continue; } else
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extern int dmar_table_init(void);
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extern int dmar_dev_scope_init(void);
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extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
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struct pci_dev ***devices, u16 segment);
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extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
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extern void dmar_free_dev_scope(struct pci_dev ***devices, int *cnt);
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/* Intel IOMMU detection */
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extern int detect_intel_iommu(void);
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extern int enable_drhd_fault_handling(void);
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#else
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static inline int detect_intel_iommu(void)
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{
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return -ENODEV;
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}
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static inline int dmar_table_init(void)
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{
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return -ENODEV;
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}
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static inline int enable_drhd_fault_handling(void)
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{
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return -1;
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}
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#endif /* !CONFIG_DMAR_TABLE */
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struct irte {
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union {
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struct {
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__u64 present : 1,
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fpd : 1,
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dst_mode : 1,
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redir_hint : 1,
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trigger_mode : 1,
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dlvry_mode : 3,
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avail : 4,
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__reserved_1 : 4,
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vector : 8,
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__reserved_2 : 8,
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dest_id : 32;
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};
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__u64 low;
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};
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union {
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struct {
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__u64 sid : 16,
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sq : 2,
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svt : 2,
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__reserved_3 : 44;
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};
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__u64 high;
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};
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};
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enum {
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IRQ_REMAP_XAPIC_MODE,
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IRQ_REMAP_X2APIC_MODE,
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};
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/* Can't use the common MSI interrupt functions
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* since DMAR is not a pci device
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*/
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struct irq_data;
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extern void dmar_msi_unmask(struct irq_data *data);
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extern void dmar_msi_mask(struct irq_data *data);
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extern void dmar_msi_read(int irq, struct msi_msg *msg);
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extern void dmar_msi_write(int irq, struct msi_msg *msg);
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extern int dmar_set_interrupt(struct intel_iommu *iommu);
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extern irqreturn_t dmar_fault(int irq, void *dev_id);
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extern int arch_setup_dmar_msi(unsigned int irq);
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#ifdef CONFIG_INTEL_IOMMU
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extern int iommu_detected, no_iommu;
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extern int dmar_parse_rmrr_atsr_dev(void);
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extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header);
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extern int dmar_parse_one_atsr(struct acpi_dmar_header *header);
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extern int intel_iommu_init(void);
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#else /* !CONFIG_INTEL_IOMMU: */
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static inline int intel_iommu_init(void) { return -ENODEV; }
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static inline int dmar_parse_one_rmrr(struct acpi_dmar_header *header)
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{
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return 0;
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}
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static inline int dmar_parse_one_atsr(struct acpi_dmar_header *header)
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{
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return 0;
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}
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static inline int dmar_parse_rmrr_atsr_dev(void)
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{
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return 0;
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}
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#endif /* CONFIG_INTEL_IOMMU */
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#endif /* __DMAR_H__ */
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