Andrew Jeffery a33547cc76 pinctrl-aspeed-g5: Never set SCU90[6] ... If a pin depending on bit 6 in SCU90 is requested for GPIO, the export will succeed but changes to the GPIO's value will not be accepted by the hardware. This is because the pinmux driver has misconfigured the SCU by writing 1 to the reserved bit. The description of SCU90[6] from the datasheet is 'Reserved, must keep at value ”0”'. The fix is to switch pinmux from the bit-flipping macro to explicitly configuring the .enable and .disable values to zero. The patch has been tested on an AST2500 EVB. Fixes: 56e57cb6c0 (pinctrl: Add pinctrl-aspeed-g5 driver) Reported-by: Uma Yadlapati <yadlapat@us.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>		2016-11-07 10:31:33 +01:00
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Kconfig	pinctrl: Add pinctrl-aspeed-g5 driver	2016-09-07 16:53:37 +02:00
Makefile	pinctrl: Add pinctrl-aspeed-g5 driver	2016-09-07 16:53:37 +02:00
pinctrl-aspeed-g4.c	…
pinctrl-aspeed-g5.c	pinctrl-aspeed-g5: Never set SCU90[6]	2016-11-07 10:31:33 +01:00
pinctrl-aspeed.c	pinctrl: aspeed: "Not enabled" is a significant mux state	2016-10-18 14:36:10 +02:00
pinctrl-aspeed.h	…