![Ulf Hansson](/assets/img/avatar_default.png)
Some of the davinci boards, da850-evm, dm644x-evm and neuros-osd2 depends on leds.h. Explicitly include it instead of relying on the public mmc header host.h. Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@kernel.org> Cc: <linux-arm-kernel@lists.infradead.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Sekhar Nori <nsekhar@ti.com>
825 lines
20 KiB
C
825 lines
20 KiB
C
/*
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* TI DaVinci EVM board support
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*
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* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/i2c/pcf857x.h>
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#include <linux/platform_data/at24.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/phy.h>
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#include <linux/clk.h>
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#include <linux/videodev2.h>
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#include <linux/v4l2-dv-timings.h>
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#include <linux/export.h>
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#include <linux/leds.h>
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#include <media/i2c/tvp514x.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/common.h>
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#include <linux/platform_data/i2c-davinci.h>
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#include <mach/serial.h>
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#include <mach/mux.h>
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#include <linux/platform_data/mtd-davinci.h>
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#include <linux/platform_data/mmc-davinci.h>
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#include <linux/platform_data/usb-davinci.h>
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#include <linux/platform_data/mtd-davinci-aemif.h>
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#include "davinci.h"
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#define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
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#define LXT971_PHY_ID (0x001378e2)
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#define LXT971_PHY_MASK (0xfffffff0)
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static struct mtd_partition davinci_evm_norflash_partitions[] = {
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/* bootloader (UBL, U-Boot, etc) in first 5 sectors */
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{
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.name = "bootloader",
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.offset = 0,
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.size = 5 * SZ_64K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next 1 sectors */
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_64K,
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.mask_flags = 0,
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},
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/* kernel */
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0
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},
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/* file system */
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{
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0
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}
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};
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static struct physmap_flash_data davinci_evm_norflash_data = {
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.width = 2,
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.parts = davinci_evm_norflash_partitions,
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.nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
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};
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/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
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* limits addresses to 16M, so using addresses past 16M will wrap */
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static struct resource davinci_evm_norflash_resource = {
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.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
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.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device davinci_evm_norflash_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &davinci_evm_norflash_data,
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},
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.num_resources = 1,
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.resource = &davinci_evm_norflash_resource,
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};
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/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
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* It may used instead of the (default) NOR chip to boot, using TI's
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* tools to install the secondary boot loader (UBL) and U-Boot.
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*/
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static struct mtd_partition davinci_evm_nandflash_partition[] = {
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/* Bootloader layout depends on whose u-boot is installed, but we
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* can hide all the details.
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* - block 0 for u-boot environment ... in mainline u-boot
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* - block 1 for UBL (plus up to four backup copies in blocks 2..5)
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* - blocks 6...? for u-boot
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* - blocks 16..23 for u-boot environment ... in TI's u-boot
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*/
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{
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.name = "bootloader",
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.offset = 0,
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.size = SZ_256K + SZ_128K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* Kernel */
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_4M,
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.mask_flags = 0,
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},
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/* File system (older GIT kernels started this on the 5MB mark) */
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{
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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}
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/* A few blocks at end hold a flash BBT ... created by TI's CCS
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* using flashwriter_nand.out, but ignored by TI's versions of
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* Linux and u-boot. We boot faster by using them.
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*/
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};
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static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
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.wsetup = 20,
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.wstrobe = 40,
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.whold = 20,
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.rsetup = 10,
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.rstrobe = 40,
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.rhold = 10,
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.ta = 40,
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};
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static struct davinci_nand_pdata davinci_evm_nandflash_data = {
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.parts = davinci_evm_nandflash_partition,
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.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.ecc_bits = 1,
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.bbt_options = NAND_BBT_USE_FLASH,
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.timing = &davinci_evm_nandflash_timing,
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};
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static struct resource davinci_evm_nandflash_resource[] = {
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{
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.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
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.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = DM644X_ASYNC_EMIF_CONTROL_BASE,
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.end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device davinci_evm_nandflash_device = {
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.name = "davinci_nand",
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.id = 0,
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.dev = {
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.platform_data = &davinci_evm_nandflash_data,
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},
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.num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
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.resource = davinci_evm_nandflash_resource,
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};
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static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device davinci_fb_device = {
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.name = "davincifb",
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.id = -1,
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.dev = {
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.dma_mask = &davinci_fb_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = 0,
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};
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static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
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.clk_polarity = 0,
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.hs_polarity = 1,
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.vs_polarity = 1
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};
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#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
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/* Inputs available at the TVP5146 */
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static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
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{
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.index = 0,
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.name = "Composite",
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.type = V4L2_INPUT_TYPE_CAMERA,
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.std = TVP514X_STD_ALL,
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},
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{
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.index = 1,
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.name = "S-Video",
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.type = V4L2_INPUT_TYPE_CAMERA,
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.std = TVP514X_STD_ALL,
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},
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};
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/*
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* this is the route info for connecting each input to decoder
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* ouput that goes to vpfe. There is a one to one correspondence
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* with tvp5146_inputs
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*/
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static struct vpfe_route dm644xevm_tvp5146_routes[] = {
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{
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.input = INPUT_CVBS_VI2B,
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.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
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},
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{
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.input = INPUT_SVIDEO_VI2C_VI1C,
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.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
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},
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};
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static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
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{
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.name = "tvp5146",
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.grp_id = 0,
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.num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
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.inputs = dm644xevm_tvp5146_inputs,
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.routes = dm644xevm_tvp5146_routes,
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.can_route = 1,
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.ccdc_if_params = {
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.if_type = VPFE_BT656,
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.hdpol = VPFE_PINPOL_POSITIVE,
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.vdpol = VPFE_PINPOL_POSITIVE,
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},
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.board_info = {
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I2C_BOARD_INFO("tvp5146", 0x5d),
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.platform_data = &dm644xevm_tvp5146_pdata,
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},
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},
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};
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static struct vpfe_config dm644xevm_capture_cfg = {
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.num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
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.i2c_adapter_id = 1,
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.sub_devs = dm644xevm_vpfe_sub_devs,
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.card_name = "DM6446 EVM",
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.ccdc = "DM6446 CCDC",
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};
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static struct platform_device rtc_dev = {
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.name = "rtc_davinci_evm",
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.id = -1,
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};
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/*----------------------------------------------------------------------*/
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#ifdef CONFIG_I2C
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/*
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* I2C GPIO expanders
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*/
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#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
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/* U2 -- LEDs */
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static struct gpio_led evm_leds[] = {
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{ .name = "DS8", .active_low = 1,
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.default_trigger = "heartbeat", },
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{ .name = "DS7", .active_low = 1, },
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{ .name = "DS6", .active_low = 1, },
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{ .name = "DS5", .active_low = 1, },
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{ .name = "DS4", .active_low = 1, },
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{ .name = "DS3", .active_low = 1, },
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{ .name = "DS2", .active_low = 1,
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.default_trigger = "mmc0", },
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{ .name = "DS1", .active_low = 1,
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.default_trigger = "disk-activity", },
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};
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static const struct gpio_led_platform_data evm_led_data = {
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.num_leds = ARRAY_SIZE(evm_leds),
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.leds = evm_leds,
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};
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static struct platform_device *evm_led_dev;
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static int
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evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
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{
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struct gpio_led *leds = evm_leds;
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int status;
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while (ngpio--) {
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leds->gpio = gpio++;
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leds++;
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}
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/* what an extremely annoying way to be forced to handle
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* device unregistration ...
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*/
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evm_led_dev = platform_device_alloc("leds-gpio", 0);
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platform_device_add_data(evm_led_dev,
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&evm_led_data, sizeof evm_led_data);
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evm_led_dev->dev.parent = &client->dev;
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status = platform_device_add(evm_led_dev);
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if (status < 0) {
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platform_device_put(evm_led_dev);
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evm_led_dev = NULL;
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}
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return status;
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}
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static int
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evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
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{
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if (evm_led_dev) {
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platform_device_unregister(evm_led_dev);
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evm_led_dev = NULL;
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}
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return 0;
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}
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static struct pcf857x_platform_data pcf_data_u2 = {
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.gpio_base = PCF_Uxx_BASE(0),
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.setup = evm_led_setup,
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.teardown = evm_led_teardown,
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};
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/* U18 - A/V clock generator and user switch */
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static int sw_gpio;
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static ssize_t
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sw_show(struct device *d, struct device_attribute *a, char *buf)
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{
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char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
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strcpy(buf, s);
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return strlen(s);
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}
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static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
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static int
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evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
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{
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int status;
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/* export dip switch option */
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sw_gpio = gpio + 7;
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status = gpio_request(sw_gpio, "user_sw");
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if (status == 0)
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status = gpio_direction_input(sw_gpio);
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if (status == 0)
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status = device_create_file(&client->dev, &dev_attr_user_sw);
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else
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gpio_free(sw_gpio);
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if (status != 0)
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sw_gpio = -EINVAL;
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/* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
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gpio_request(gpio + 3, "pll_fs2");
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gpio_direction_output(gpio + 3, 0);
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gpio_request(gpio + 2, "pll_fs1");
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gpio_direction_output(gpio + 2, 0);
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gpio_request(gpio + 1, "pll_sr");
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gpio_direction_output(gpio + 1, 0);
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return 0;
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}
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static int
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evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
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{
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gpio_free(gpio + 1);
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gpio_free(gpio + 2);
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gpio_free(gpio + 3);
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if (sw_gpio > 0) {
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device_remove_file(&client->dev, &dev_attr_user_sw);
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gpio_free(sw_gpio);
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}
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return 0;
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}
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static struct pcf857x_platform_data pcf_data_u18 = {
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.gpio_base = PCF_Uxx_BASE(1),
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.n_latch = (1 << 3) | (1 << 2) | (1 << 1),
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.setup = evm_u18_setup,
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.teardown = evm_u18_teardown,
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};
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/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
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static int
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evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
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{
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/* p0 = nDRV_VBUS (initial: don't supply it) */
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gpio_request(gpio + 0, "nDRV_VBUS");
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gpio_direction_output(gpio + 0, 1);
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/* p1 = VDDIMX_EN */
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gpio_request(gpio + 1, "VDDIMX_EN");
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gpio_direction_output(gpio + 1, 1);
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/* p2 = VLYNQ_EN */
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gpio_request(gpio + 2, "VLYNQ_EN");
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gpio_direction_output(gpio + 2, 1);
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/* p3 = n3V3_CF_RESET (initial: stay in reset) */
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gpio_request(gpio + 3, "nCF_RESET");
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gpio_direction_output(gpio + 3, 0);
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/* (p4 unused) */
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/* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
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gpio_request(gpio + 5, "WLAN_RESET");
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gpio_direction_output(gpio + 5, 1);
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/* p6 = nATA_SEL (initial: select) */
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gpio_request(gpio + 6, "nATA_SEL");
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gpio_direction_output(gpio + 6, 0);
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/* p7 = nCF_SEL (initial: deselect) */
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gpio_request(gpio + 7, "nCF_SEL");
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gpio_direction_output(gpio + 7, 1);
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return 0;
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}
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static int
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evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
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{
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gpio_free(gpio + 7);
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gpio_free(gpio + 6);
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gpio_free(gpio + 5);
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gpio_free(gpio + 3);
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gpio_free(gpio + 2);
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gpio_free(gpio + 1);
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gpio_free(gpio + 0);
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return 0;
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}
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static struct pcf857x_platform_data pcf_data_u35 = {
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.gpio_base = PCF_Uxx_BASE(2),
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.setup = evm_u35_setup,
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.teardown = evm_u35_teardown,
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};
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/*----------------------------------------------------------------------*/
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/* Most of this EEPROM is unused, but U-Boot uses some data:
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* - 0x7f00, 6 bytes Ethernet Address
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* - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
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* - ... newer boards may have more
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*/
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static struct at24_platform_data eeprom_info = {
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.byte_len = (256*1024) / 8,
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.page_size = 64,
|
|
.flags = AT24_FLAG_ADDR16,
|
|
.setup = davinci_get_mac_addr,
|
|
.context = (void *)0x7f00,
|
|
};
|
|
|
|
/*
|
|
* MSP430 supports RTC, card detection, input from IR remote, and
|
|
* a bit more. It triggers interrupts on GPIO(7) from pressing
|
|
* buttons on the IR remote, and for card detect switches.
|
|
*/
|
|
static struct i2c_client *dm6446evm_msp;
|
|
|
|
static int dm6446evm_msp_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
dm6446evm_msp = client;
|
|
return 0;
|
|
}
|
|
|
|
static int dm6446evm_msp_remove(struct i2c_client *client)
|
|
{
|
|
dm6446evm_msp = NULL;
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id dm6446evm_msp_ids[] = {
|
|
{ "dm6446evm_msp", 0, },
|
|
{ /* end of list */ },
|
|
};
|
|
|
|
static struct i2c_driver dm6446evm_msp_driver = {
|
|
.driver.name = "dm6446evm_msp",
|
|
.id_table = dm6446evm_msp_ids,
|
|
.probe = dm6446evm_msp_probe,
|
|
.remove = dm6446evm_msp_remove,
|
|
};
|
|
|
|
static int dm6444evm_msp430_get_pins(void)
|
|
{
|
|
static const char txbuf[2] = { 2, 4, };
|
|
char buf[4];
|
|
struct i2c_msg msg[2] = {
|
|
{
|
|
.flags = 0,
|
|
.len = 2,
|
|
.buf = (void __force *)txbuf,
|
|
},
|
|
{
|
|
.flags = I2C_M_RD,
|
|
.len = 4,
|
|
.buf = buf,
|
|
},
|
|
};
|
|
int status;
|
|
|
|
if (!dm6446evm_msp)
|
|
return -ENXIO;
|
|
|
|
msg[0].addr = dm6446evm_msp->addr;
|
|
msg[1].addr = dm6446evm_msp->addr;
|
|
|
|
/* Command 4 == get input state, returns port 2 and port3 data
|
|
* S Addr W [A] len=2 [A] cmd=4 [A]
|
|
* RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
|
|
*/
|
|
status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
|
|
if (status < 0)
|
|
return status;
|
|
|
|
dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
|
|
|
|
return (buf[3] << 8) | buf[2];
|
|
}
|
|
|
|
static int dm6444evm_mmc_get_cd(int module)
|
|
{
|
|
int status = dm6444evm_msp430_get_pins();
|
|
|
|
return (status < 0) ? status : !(status & BIT(1));
|
|
}
|
|
|
|
static int dm6444evm_mmc_get_ro(int module)
|
|
{
|
|
int status = dm6444evm_msp430_get_pins();
|
|
|
|
return (status < 0) ? status : status & BIT(6 + 8);
|
|
}
|
|
|
|
static struct davinci_mmc_config dm6446evm_mmc_config = {
|
|
.get_cd = dm6444evm_mmc_get_cd,
|
|
.get_ro = dm6444evm_mmc_get_ro,
|
|
.wires = 4,
|
|
};
|
|
|
|
static struct i2c_board_info __initdata i2c_info[] = {
|
|
{
|
|
I2C_BOARD_INFO("dm6446evm_msp", 0x23),
|
|
},
|
|
{
|
|
I2C_BOARD_INFO("pcf8574", 0x38),
|
|
.platform_data = &pcf_data_u2,
|
|
},
|
|
{
|
|
I2C_BOARD_INFO("pcf8574", 0x39),
|
|
.platform_data = &pcf_data_u18,
|
|
},
|
|
{
|
|
I2C_BOARD_INFO("pcf8574", 0x3a),
|
|
.platform_data = &pcf_data_u35,
|
|
},
|
|
{
|
|
I2C_BOARD_INFO("24c256", 0x50),
|
|
.platform_data = &eeprom_info,
|
|
},
|
|
{
|
|
I2C_BOARD_INFO("tlv320aic33", 0x1b),
|
|
},
|
|
};
|
|
|
|
/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
|
|
* which requires 100 usec of idle bus after i2c writes sent to it.
|
|
*/
|
|
static struct davinci_i2c_platform_data i2c_pdata = {
|
|
.bus_freq = 20 /* kHz */,
|
|
.bus_delay = 100 /* usec */,
|
|
.sda_pin = 44,
|
|
.scl_pin = 43,
|
|
};
|
|
|
|
static void __init evm_init_i2c(void)
|
|
{
|
|
davinci_init_i2c(&i2c_pdata);
|
|
i2c_add_driver(&dm6446evm_msp_driver);
|
|
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
|
|
}
|
|
#endif
|
|
|
|
#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
|
|
|
|
/* venc standard timings */
|
|
static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
|
|
{
|
|
.name = "ntsc",
|
|
.timings_type = VPBE_ENC_STD,
|
|
.std_id = V4L2_STD_NTSC,
|
|
.interlaced = 1,
|
|
.xres = 720,
|
|
.yres = 480,
|
|
.aspect = {11, 10},
|
|
.fps = {30000, 1001},
|
|
.left_margin = 0x79,
|
|
.upper_margin = 0x10,
|
|
},
|
|
{
|
|
.name = "pal",
|
|
.timings_type = VPBE_ENC_STD,
|
|
.std_id = V4L2_STD_PAL,
|
|
.interlaced = 1,
|
|
.xres = 720,
|
|
.yres = 576,
|
|
.aspect = {54, 59},
|
|
.fps = {25, 1},
|
|
.left_margin = 0x7e,
|
|
.upper_margin = 0x16,
|
|
},
|
|
};
|
|
|
|
/* venc dv preset timings */
|
|
static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
|
|
{
|
|
.name = "480p59_94",
|
|
.timings_type = VPBE_ENC_DV_TIMINGS,
|
|
.dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
|
|
.interlaced = 0,
|
|
.xres = 720,
|
|
.yres = 480,
|
|
.aspect = {1, 1},
|
|
.fps = {5994, 100},
|
|
.left_margin = 0x80,
|
|
.upper_margin = 0x20,
|
|
},
|
|
{
|
|
.name = "576p50",
|
|
.timings_type = VPBE_ENC_DV_TIMINGS,
|
|
.dv_timings = V4L2_DV_BT_CEA_720X576P50,
|
|
.interlaced = 0,
|
|
.xres = 720,
|
|
.yres = 576,
|
|
.aspect = {1, 1},
|
|
.fps = {50, 1},
|
|
.left_margin = 0x7e,
|
|
.upper_margin = 0x30,
|
|
},
|
|
};
|
|
|
|
/*
|
|
* The outputs available from VPBE + encoders. Keep the order same
|
|
* as that of encoders. First those from venc followed by that from
|
|
* encoders. Index in the output refers to index on a particular encoder.
|
|
* Driver uses this index to pass it to encoder when it supports more
|
|
* than one output. Userspace applications use index of the array to
|
|
* set an output.
|
|
*/
|
|
static struct vpbe_output dm644xevm_vpbe_outputs[] = {
|
|
{
|
|
.output = {
|
|
.index = 0,
|
|
.name = "Composite",
|
|
.type = V4L2_OUTPUT_TYPE_ANALOG,
|
|
.std = VENC_STD_ALL,
|
|
.capabilities = V4L2_OUT_CAP_STD,
|
|
},
|
|
.subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
|
|
.default_mode = "ntsc",
|
|
.num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
|
|
.modes = dm644xevm_enc_std_timing,
|
|
},
|
|
{
|
|
.output = {
|
|
.index = 1,
|
|
.name = "Component",
|
|
.type = V4L2_OUTPUT_TYPE_ANALOG,
|
|
.capabilities = V4L2_OUT_CAP_DV_TIMINGS,
|
|
},
|
|
.subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
|
|
.default_mode = "480p59_94",
|
|
.num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
|
|
.modes = dm644xevm_enc_preset_timing,
|
|
},
|
|
};
|
|
|
|
static struct vpbe_config dm644xevm_display_cfg = {
|
|
.module_name = "dm644x-vpbe-display",
|
|
.i2c_adapter_id = 1,
|
|
.osd = {
|
|
.module_name = DM644X_VPBE_OSD_SUBDEV_NAME,
|
|
},
|
|
.venc = {
|
|
.module_name = DM644X_VPBE_VENC_SUBDEV_NAME,
|
|
},
|
|
.num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
|
|
.outputs = dm644xevm_vpbe_outputs,
|
|
};
|
|
|
|
static struct platform_device *davinci_evm_devices[] __initdata = {
|
|
&davinci_fb_device,
|
|
&rtc_dev,
|
|
};
|
|
|
|
static void __init
|
|
davinci_evm_map_io(void)
|
|
{
|
|
dm644x_init();
|
|
}
|
|
|
|
static int davinci_phy_fixup(struct phy_device *phydev)
|
|
{
|
|
unsigned int control;
|
|
/* CRITICAL: Fix for increasing PHY signal drive strength for
|
|
* TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
|
|
* signal strength was low causing TX to fail randomly. The
|
|
* fix is to Set bit 11 (Increased MII drive strength) of PHY
|
|
* register 26 (Digital Config register) on this phy. */
|
|
control = phy_read(phydev, 26);
|
|
phy_write(phydev, 26, (control | 0x800));
|
|
return 0;
|
|
}
|
|
|
|
#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
|
|
|
|
#define HAS_NOR IS_ENABLED(CONFIG_MTD_PHYSMAP)
|
|
|
|
#define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
|
|
|
|
static __init void davinci_evm_init(void)
|
|
{
|
|
int ret;
|
|
struct clk *aemif_clk;
|
|
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
|
|
|
ret = dm644x_gpio_register();
|
|
if (ret)
|
|
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
|
|
|
|
aemif_clk = clk_get(NULL, "aemif");
|
|
clk_prepare_enable(aemif_clk);
|
|
|
|
if (HAS_ATA) {
|
|
if (HAS_NAND || HAS_NOR)
|
|
pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
|
|
"\tDisable IDE for NAND/NOR support\n");
|
|
davinci_init_ide();
|
|
} else if (HAS_NAND || HAS_NOR) {
|
|
davinci_cfg_reg(DM644X_HPIEN_DISABLE);
|
|
davinci_cfg_reg(DM644X_ATAEN_DISABLE);
|
|
|
|
/* only one device will be jumpered and detected */
|
|
if (HAS_NAND) {
|
|
platform_device_register(&davinci_evm_nandflash_device);
|
|
|
|
if (davinci_aemif_setup(&davinci_evm_nandflash_device))
|
|
pr_warn("%s: Cannot configure AEMIF\n",
|
|
__func__);
|
|
|
|
#ifdef CONFIG_I2C
|
|
evm_leds[7].default_trigger = "nand-disk";
|
|
#endif
|
|
if (HAS_NOR)
|
|
pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
|
|
} else if (HAS_NOR)
|
|
platform_device_register(&davinci_evm_norflash_device);
|
|
}
|
|
|
|
platform_add_devices(davinci_evm_devices,
|
|
ARRAY_SIZE(davinci_evm_devices));
|
|
#ifdef CONFIG_I2C
|
|
evm_init_i2c();
|
|
davinci_setup_mmc(0, &dm6446evm_mmc_config);
|
|
#endif
|
|
dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
|
|
|
|
davinci_serial_init(dm644x_serial_device);
|
|
dm644x_init_asp();
|
|
|
|
/* irlml6401 switches over 1A, in under 8 msec */
|
|
davinci_setup_usb(1000, 8);
|
|
|
|
if (IS_BUILTIN(CONFIG_PHYLIB)) {
|
|
soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
|
|
/* Register the fixup for PHY on DaVinci */
|
|
phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
|
|
davinci_phy_fixup);
|
|
}
|
|
}
|
|
|
|
MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
|
|
/* Maintainer: MontaVista Software <source@mvista.com> */
|
|
.atag_offset = 0x100,
|
|
.map_io = davinci_evm_map_io,
|
|
.init_irq = davinci_irq_init,
|
|
.init_time = davinci_timer_init,
|
|
.init_machine = davinci_evm_init,
|
|
.init_late = davinci_init_late,
|
|
.dma_zone_size = SZ_128M,
|
|
.restart = davinci_restart,
|
|
MACHINE_END
|