072f0a6338
On systems with mismatched i/d cache min line sizes, we need to use the smallest size possible across all CPUs. This will be done by fetching the system wide safe value from CPU feature infrastructure. However the some special users(e.g kexec, hibernate) would need the line size on the CPU (rather than the system wide), when either the system wide feature may not be accessible or it is guranteed that the caller executes with a gurantee of no migration. Provide another helper which will fetch cache line size on the current CPU. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Acked-by: James Morse <james.morse@arm.com> Reviewed-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
131 lines
2.9 KiB
ArmAsm
131 lines
2.9 KiB
ArmAsm
/*
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* kexec for arm64
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*
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* Copyright (C) Linaro.
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* Copyright (C) Huawei Futurewei Technologies.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kexec.h>
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/kexec.h>
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#include <asm/page.h>
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#include <asm/sysreg.h>
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/*
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* arm64_relocate_new_kernel - Put a 2nd stage image in place and boot it.
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*
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* The memory that the old kernel occupies may be overwritten when coping the
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* new image to its final location. To assure that the
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* arm64_relocate_new_kernel routine which does that copy is not overwritten,
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* all code and data needed by arm64_relocate_new_kernel must be between the
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* symbols arm64_relocate_new_kernel and arm64_relocate_new_kernel_end. The
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* machine_kexec() routine will copy arm64_relocate_new_kernel to the kexec
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* control_code_page, a special page which has been set up to be preserved
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* during the copy operation.
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*/
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ENTRY(arm64_relocate_new_kernel)
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/* Setup the list loop variables. */
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mov x17, x1 /* x17 = kimage_start */
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mov x16, x0 /* x16 = kimage_head */
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raw_dcache_line_size x15, x0 /* x15 = dcache line size */
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mov x14, xzr /* x14 = entry ptr */
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mov x13, xzr /* x13 = copy dest */
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/* Clear the sctlr_el2 flags. */
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mrs x0, CurrentEL
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cmp x0, #CurrentEL_EL2
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b.ne 1f
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mrs x0, sctlr_el2
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ldr x1, =SCTLR_ELx_FLAGS
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bic x0, x0, x1
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msr sctlr_el2, x0
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isb
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1:
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/* Check if the new image needs relocation. */
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tbnz x16, IND_DONE_BIT, .Ldone
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.Lloop:
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and x12, x16, PAGE_MASK /* x12 = addr */
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/* Test the entry flags. */
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.Ltest_source:
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tbz x16, IND_SOURCE_BIT, .Ltest_indirection
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/* Invalidate dest page to PoC. */
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mov x0, x13
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add x20, x0, #PAGE_SIZE
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sub x1, x15, #1
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bic x0, x0, x1
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2: dc ivac, x0
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add x0, x0, x15
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cmp x0, x20
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b.lo 2b
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dsb sy
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mov x20, x13
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mov x21, x12
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copy_page x20, x21, x0, x1, x2, x3, x4, x5, x6, x7
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/* dest += PAGE_SIZE */
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add x13, x13, PAGE_SIZE
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b .Lnext
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.Ltest_indirection:
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tbz x16, IND_INDIRECTION_BIT, .Ltest_destination
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/* ptr = addr */
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mov x14, x12
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b .Lnext
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.Ltest_destination:
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tbz x16, IND_DESTINATION_BIT, .Lnext
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/* dest = addr */
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mov x13, x12
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.Lnext:
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/* entry = *ptr++ */
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ldr x16, [x14], #8
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/* while (!(entry & DONE)) */
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tbz x16, IND_DONE_BIT, .Lloop
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.Ldone:
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/* wait for writes from copy_page to finish */
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dsb nsh
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ic iallu
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dsb nsh
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isb
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/* Start new image. */
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mov x0, xzr
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mov x1, xzr
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mov x2, xzr
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mov x3, xzr
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br x17
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ENDPROC(arm64_relocate_new_kernel)
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.ltorg
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.align 3 /* To keep the 64-bit values below naturally aligned. */
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.Lcopy_end:
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.org KEXEC_CONTROL_PAGE_SIZE
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/*
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* arm64_relocate_new_kernel_size - Number of bytes to copy to the
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* control_code_page.
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*/
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.globl arm64_relocate_new_kernel_size
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arm64_relocate_new_kernel_size:
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.quad .Lcopy_end - arm64_relocate_new_kernel
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