feb3d79800
Add phy clock enable code to phy_power_on/off callbacks, and remove explicit calls to enable these phy clocks from the ufs-qcom hcd driver. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
42 lines
1.3 KiB
C
42 lines
1.3 KiB
C
/*
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* Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef PHY_QCOM_UFS_H_
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#define PHY_QCOM_UFS_H_
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#include "phy.h"
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/**
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* ufs_qcom_phy_enable_dev_ref_clk() - Enable the device
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* ref clock.
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* @phy: reference to a generic phy.
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*/
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void ufs_qcom_phy_enable_dev_ref_clk(struct phy *phy);
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/**
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* ufs_qcom_phy_disable_dev_ref_clk() - Disable the device
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* ref clock.
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* @phy: reference to a generic phy.
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*/
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void ufs_qcom_phy_disable_dev_ref_clk(struct phy *phy);
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int ufs_qcom_phy_start_serdes(struct phy *phy);
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int ufs_qcom_phy_set_tx_lane_enable(struct phy *phy, u32 tx_lanes);
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int ufs_qcom_phy_calibrate_phy(struct phy *phy, bool is_rate_B);
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int ufs_qcom_phy_is_pcs_ready(struct phy *phy);
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void ufs_qcom_phy_save_controller_version(struct phy *phy,
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u8 major, u16 minor, u16 step);
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#endif /* PHY_QCOM_UFS_H_ */
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