![Sylwester Nawrocki](/assets/img/avatar_default.png)
After the Exynos Power Management Unit (PMU) driver was converted to the platform device driver in commit14fc8b93d4
("ARM: EXYNOS: Add platform driver support for Exynos PMU") and then PMU device nodes added to Exynos4 DTs in commit7b9613aca4
("ARM: dts: add PMU syscon node for exynos4") the mipi video phy driver started failing probing, due to overlapping memory mapped register region resources. Now all the Exynos peripheral devices which have registers in the PMU region are supposed to use the regmap provided by the syscon driver. So support for regmap is added in this patch, this unfortunately creates yet another indirection into that supposedly trivial driver. The additional mutex is required because single register is used by PHY pairs (they share bit in a register). An improvement here could be to allow a PHY instance be created with a driver custom mutex, which would then be common for each PHY pair. This would eliminate one of 3 mutexes which need to be taken in the phy_power_on/ phy_power_off code path. However, I tried to keep this bug fix patch possibly simple. This change is needed to make MIPI DSI displays and MIPI CSI-2 camera sensors working again on Exynos4 boards. Cc: Pankaj Dubey <pankaj.dubey@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
22 lines
695 B
C
22 lines
695 B
C
/*
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* Copyright (C) 2015 Samsung Electronics Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_
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#define _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_
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/* Exynos4 PMU register definitions */
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/* MIPI_PHYn_CONTROL register offset: n = 0..1 */
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#define EXYNOS4_MIPI_PHY_CONTROL(n) (0x710 + (n) * 4)
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#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0)
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#define EXYNOS4_MIPI_PHY_SRESETN (1 << 1)
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#define EXYNOS4_MIPI_PHY_MRESETN (1 << 2)
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#define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1)
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#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ */
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