5cf0c7f650
fpga-mgr has three methods for programming FPGAs, depending on whether the image is in a scatter gather list, a contiguous buffer, or a firmware file. This makes it difficult to write upper layers as the caller has to assume whether the FPGA image is in a sg table, as a single buffer, or a firmware file. This commit moves these parameters to struct fpga_image_info and adds a single function for programming fpgas. New functions: * fpga_mgr_load - given fpga manager and struct fpga_image_info, program the fpga. * fpga_image_info_alloc - alloc a struct fpga_image_info. * fpga_image_info_free - free a struct fpga_image_info. These three functions are unexported: * fpga_mgr_buf_load_sg * fpga_mgr_buf_load * fpga_mgr_firmware_load Also use devm_kstrdup to copy firmware_name so we aren't making assumptions about where it comes from when allocing/freeing the struct fpga_image_info. API documentation has been updated and a new document for FPGA region has been added. Signed-off-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
24 lines
1 KiB
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24 lines
1 KiB
Plaintext
Linux kernel FPGA support
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Alan Tull 2017
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The main point of this project has been to separate the out the upper layers
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that know when to reprogram a FPGA from the lower layers that know how to
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reprogram a specific FPGA device. The intention is to make this manufacturer
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agnostic, understanding that of course the FPGA images are very device specific
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themselves.
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The framework in the kernel includes:
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* low level FPGA manager drivers that know how to program a specific device
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* the fpga-mgr framework they are registered with
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* low level FPGA bridge drivers for hard/soft bridges which are intended to
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be disable during FPGA programming
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* the fpga-bridge framework they are registered with
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* the fpga-region framework which associates and controls managers and bridges
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as reconfigurable regions
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* the of-fpga-region support for reprogramming FPGAs when device tree overlays
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are applied.
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I would encourage you the user to add code that creates FPGA regions rather
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that trying to control managers and bridges separately.
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