![Axel Lin](/assets/img/avatar_default.png)
Convert the drivers in drivers/i2c/busses/* to usemodule_pci_driver() macro which makes the code smaller and a bit simpler. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Rudolf Marek <r.marek@assembler.cz> Cc: Olof Johansson <olof@lixom.net> Cc: "Mark M. Hoffman" <mhoffman@lightlink.com> Cc: Tomoya MORINAGA <tomoya.rohm@gmail.com>
523 lines
15 KiB
C
523 lines
15 KiB
C
/*
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Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and
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Philip Edelbrock <phil@netroedge.com> and
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Mark D. Studebaker <mdsxyz123@yahoo.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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This is the driver for the SMB Host controller on
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Acer Labs Inc. (ALI) M1541 and M1543C South Bridges.
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The M1543C is a South bridge for desktop systems.
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The M1533 is a South bridge for portable systems.
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They are part of the following ALI chipsets:
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"Aladdin Pro 2": Includes the M1621 Slot 1 North bridge
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with AGP and 100MHz CPU Front Side bus
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"Aladdin V": Includes the M1541 Socket 7 North bridge
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with AGP and 100MHz CPU Front Side bus
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"Aladdin IV": Includes the M1541 Socket 7 North bridge
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with host bus up to 83.3 MHz.
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For an overview of these chips see http://www.acerlabs.com
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The M1533/M1543C devices appear as FOUR separate devices
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on the PCI bus. An output of lspci will show something similar
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to the following:
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00:02.0 USB Controller: Acer Laboratories Inc. M5237
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00:03.0 Bridge: Acer Laboratories Inc. M7101
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00:07.0 ISA bridge: Acer Laboratories Inc. M1533
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00:0f.0 IDE interface: Acer Laboratories Inc. M5229
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The SMB controller is part of the 7101 device, which is an
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ACPI-compliant Power Management Unit (PMU).
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The whole 7101 device has to be enabled for the SMB to work.
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You can't just enable the SMB alone.
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The SMB and the ACPI have separate I/O spaces.
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We make sure that the SMB is enabled. We leave the ACPI alone.
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This driver controls the SMB Host only.
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The SMB Slave controller on the M15X3 is not enabled.
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This driver does not use interrupts.
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*/
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/* Note: we assume there can only be one ALI15X3, with one SMBus interface */
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <linux/io.h>
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/* ALI15X3 SMBus address offsets */
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#define SMBHSTSTS (0 + ali15x3_smba)
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#define SMBHSTCNT (1 + ali15x3_smba)
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#define SMBHSTSTART (2 + ali15x3_smba)
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#define SMBHSTCMD (7 + ali15x3_smba)
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#define SMBHSTADD (3 + ali15x3_smba)
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#define SMBHSTDAT0 (4 + ali15x3_smba)
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#define SMBHSTDAT1 (5 + ali15x3_smba)
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#define SMBBLKDAT (6 + ali15x3_smba)
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/* PCI Address Constants */
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#define SMBCOM 0x004
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#define SMBBA 0x014
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#define SMBATPC 0x05B /* used to unlock xxxBA registers */
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#define SMBHSTCFG 0x0E0
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#define SMBSLVC 0x0E1
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#define SMBCLK 0x0E2
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#define SMBREV 0x008
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/* Other settings */
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#define MAX_TIMEOUT 200 /* times 1/100 sec */
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#define ALI15X3_SMB_IOSIZE 32
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/* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
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We don't use these here. If the bases aren't set to some value we
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tell user to upgrade BIOS and we fail.
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*/
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#define ALI15X3_SMB_DEFAULTBASE 0xE800
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/* ALI15X3 address lock bits */
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#define ALI15X3_LOCK 0x06
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/* ALI15X3 command constants */
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#define ALI15X3_ABORT 0x02
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#define ALI15X3_T_OUT 0x04
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#define ALI15X3_QUICK 0x00
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#define ALI15X3_BYTE 0x10
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#define ALI15X3_BYTE_DATA 0x20
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#define ALI15X3_WORD_DATA 0x30
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#define ALI15X3_BLOCK_DATA 0x40
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#define ALI15X3_BLOCK_CLR 0x80
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/* ALI15X3 status register bits */
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#define ALI15X3_STS_IDLE 0x04
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#define ALI15X3_STS_BUSY 0x08
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#define ALI15X3_STS_DONE 0x10
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#define ALI15X3_STS_DEV 0x20 /* device error */
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#define ALI15X3_STS_COLL 0x40 /* collision or no response */
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#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
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#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
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/* If force_addr is set to anything different from 0, we forcibly enable
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the device at the given address. */
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static u16 force_addr;
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module_param(force_addr, ushort, 0);
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MODULE_PARM_DESC(force_addr,
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"Initialize the base address of the i2c controller");
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static struct pci_driver ali15x3_driver;
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static unsigned short ali15x3_smba;
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static int __devinit ali15x3_setup(struct pci_dev *ALI15X3_dev)
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{
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u16 a;
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unsigned char temp;
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/* Check the following things:
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- SMB I/O address is initialized
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- Device is enabled
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- We can use the addresses
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*/
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/* Unlock the register.
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The data sheet says that the address registers are read-only
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if the lock bits are 1, but in fact the address registers
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are zero unless you clear the lock bits.
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*/
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pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp);
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if (temp & ALI15X3_LOCK) {
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temp &= ~ALI15X3_LOCK;
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pci_write_config_byte(ALI15X3_dev, SMBATPC, temp);
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}
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/* Determine the address of the SMBus area */
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pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba);
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ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1));
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if (ali15x3_smba == 0 && force_addr == 0) {
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dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized "
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"- upgrade BIOS or use force_addr=0xaddr\n");
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return -ENODEV;
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}
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if(force_addr)
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ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);
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if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
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ali15x3_driver.name))
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return -EBUSY;
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if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
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ali15x3_driver.name)) {
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dev_err(&ALI15X3_dev->dev,
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"ALI15X3_smb region 0x%x already in use!\n",
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ali15x3_smba);
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return -ENODEV;
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}
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if(force_addr) {
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dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
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ali15x3_smba);
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if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
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SMBBA,
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ali15x3_smba))
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goto error;
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if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
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SMBBA, &a))
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goto error;
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if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
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/* make sure it works */
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dev_err(&ALI15X3_dev->dev,
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"force address failed - not supported?\n");
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goto error;
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}
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}
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/* check if whole device is enabled */
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pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp);
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if ((temp & 1) == 0) {
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dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n");
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pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01);
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}
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/* Is SMB Host controller enabled? */
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pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp);
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if ((temp & 1) == 0) {
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dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n");
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pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01);
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}
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/* set SMB clock to 74KHz as recommended in data sheet */
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pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20);
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/*
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The interrupt routing for SMB is set up in register 0x77 in the
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1533 ISA Bridge device, NOT in the 7101 device.
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Don't bother with finding the 1533 device and reading the register.
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if ((....... & 0x0F) == 1)
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dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n");
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*/
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pci_read_config_byte(ALI15X3_dev, SMBREV, &temp);
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dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp);
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dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba);
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return 0;
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error:
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release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
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return -ENODEV;
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}
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/* Another internally used function */
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static int ali15x3_transaction(struct i2c_adapter *adap)
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{
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int temp;
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int result = 0;
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int timeout = 0;
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dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, "
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"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
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inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
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inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
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/* get status */
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temp = inb_p(SMBHSTSTS);
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/* Make sure the SMBus host is ready to start transmitting */
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/* Check the busy bit first */
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if (temp & ALI15X3_STS_BUSY) {
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/*
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If the host controller is still busy, it may have timed out in the
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previous transaction, resulting in a "SMBus Timeout" Dev.
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I've tried the following to reset a stuck busy bit.
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1. Reset the controller with an ABORT command.
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(this doesn't seem to clear the controller if an external
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device is hung)
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2. Reset the controller and the other SMBus devices with a
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T_OUT command. (this clears the host busy bit if an
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external device is hung, but it comes back upon a new access
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to a device)
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3. Disable and reenable the controller in SMBHSTCFG
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Worst case, nothing seems to work except power reset.
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*/
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/* Abort - reset the host controller */
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/*
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Try resetting entire SMB bus, including other devices -
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This may not work either - it clears the BUSY bit but
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then the BUSY bit may come back on when you try and use the chip again.
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If that's the case you are stuck.
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*/
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dev_info(&adap->dev, "Resetting entire SMB Bus to "
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"clear busy condition (%02x)\n", temp);
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outb_p(ALI15X3_T_OUT, SMBHSTCNT);
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temp = inb_p(SMBHSTSTS);
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}
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/* now check the error bits and the busy bit */
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if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
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/* do a clear-on-write */
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outb_p(0xFF, SMBHSTSTS);
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if ((temp = inb_p(SMBHSTSTS)) &
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(ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
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/* this is probably going to be correctable only by a power reset
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as one of the bits now appears to be stuck */
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/* This may be a bus or device with electrical problems. */
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dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
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"controller or device on bus is probably hung\n",
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temp);
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return -EBUSY;
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}
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} else {
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/* check and clear done bit */
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if (temp & ALI15X3_STS_DONE) {
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outb_p(temp, SMBHSTSTS);
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}
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}
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/* start the transaction by writing anything to the start register */
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outb_p(0xFF, SMBHSTSTART);
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/* We will always wait for a fraction of a second! */
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timeout = 0;
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do {
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msleep(1);
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temp = inb_p(SMBHSTSTS);
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} while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)))
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&& (timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout > MAX_TIMEOUT) {
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result = -ETIMEDOUT;
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dev_err(&adap->dev, "SMBus Timeout!\n");
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}
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if (temp & ALI15X3_STS_TERM) {
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result = -EIO;
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dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
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}
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/*
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Unfortunately the ALI SMB controller maps "no response" and "bus
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collision" into a single bit. No response is the usual case so don't
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do a printk.
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This means that bus collisions go unreported.
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*/
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if (temp & ALI15X3_STS_COLL) {
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result = -ENXIO;
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dev_dbg(&adap->dev,
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"Error: no response or bus collision ADD=%02x\n",
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inb_p(SMBHSTADD));
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}
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/* haven't ever seen this */
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if (temp & ALI15X3_STS_DEV) {
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result = -EIO;
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dev_err(&adap->dev, "Error: device error\n");
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}
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dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
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"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
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inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
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inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
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return result;
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}
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/* Return negative errno on error. */
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static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
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unsigned short flags, char read_write, u8 command,
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int size, union i2c_smbus_data * data)
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{
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int i, len;
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int temp;
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int timeout;
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/* clear all the bits (clear-on-write) */
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outb_p(0xFF, SMBHSTSTS);
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/* make sure SMBus is idle */
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temp = inb_p(SMBHSTSTS);
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for (timeout = 0;
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(timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
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timeout++) {
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msleep(1);
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temp = inb_p(SMBHSTSTS);
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}
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if (timeout >= MAX_TIMEOUT) {
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dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp);
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}
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switch (size) {
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case I2C_SMBUS_QUICK:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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size = ALI15X3_QUICK;
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break;
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case I2C_SMBUS_BYTE:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(command, SMBHSTCMD);
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size = ALI15X3_BYTE;
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break;
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case I2C_SMBUS_BYTE_DATA:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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outb_p(command, SMBHSTCMD);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(data->byte, SMBHSTDAT0);
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size = ALI15X3_BYTE_DATA;
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break;
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case I2C_SMBUS_WORD_DATA:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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outb_p(command, SMBHSTCMD);
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if (read_write == I2C_SMBUS_WRITE) {
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outb_p(data->word & 0xff, SMBHSTDAT0);
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outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
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}
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size = ALI15X3_WORD_DATA;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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outb_p(command, SMBHSTCMD);
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if (read_write == I2C_SMBUS_WRITE) {
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len = data->block[0];
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if (len < 0) {
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len = 0;
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data->block[0] = len;
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}
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if (len > 32) {
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len = 32;
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data->block[0] = len;
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}
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outb_p(len, SMBHSTDAT0);
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/* Reset SMBBLKDAT */
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outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
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for (i = 1; i <= len; i++)
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outb_p(data->block[i], SMBBLKDAT);
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}
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size = ALI15X3_BLOCK_DATA;
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break;
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default:
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dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
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return -EOPNOTSUPP;
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}
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outb_p(size, SMBHSTCNT); /* output command */
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temp = ali15x3_transaction(adap);
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if (temp)
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return temp;
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if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK))
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return 0;
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switch (size) {
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case ALI15X3_BYTE: /* Result put in SMBHSTDAT0 */
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data->byte = inb_p(SMBHSTDAT0);
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break;
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case ALI15X3_BYTE_DATA:
|
|
data->byte = inb_p(SMBHSTDAT0);
|
|
break;
|
|
case ALI15X3_WORD_DATA:
|
|
data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
|
|
break;
|
|
case ALI15X3_BLOCK_DATA:
|
|
len = inb_p(SMBHSTDAT0);
|
|
if (len > 32)
|
|
len = 32;
|
|
data->block[0] = len;
|
|
/* Reset SMBBLKDAT */
|
|
outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
|
|
for (i = 1; i <= data->block[0]; i++) {
|
|
data->block[i] = inb_p(SMBBLKDAT);
|
|
dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n",
|
|
len, i, data->block[i]);
|
|
}
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static u32 ali15x3_func(struct i2c_adapter *adapter)
|
|
{
|
|
return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
|
|
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
|
|
I2C_FUNC_SMBUS_BLOCK_DATA;
|
|
}
|
|
|
|
static const struct i2c_algorithm smbus_algorithm = {
|
|
.smbus_xfer = ali15x3_access,
|
|
.functionality = ali15x3_func,
|
|
};
|
|
|
|
static struct i2c_adapter ali15x3_adapter = {
|
|
.owner = THIS_MODULE,
|
|
.class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
|
|
.algo = &smbus_algorithm,
|
|
};
|
|
|
|
static DEFINE_PCI_DEVICE_TABLE(ali15x3_ids) = {
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
|
|
{ 0, }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE (pci, ali15x3_ids);
|
|
|
|
static int __devinit ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id)
|
|
{
|
|
if (ali15x3_setup(dev)) {
|
|
dev_err(&dev->dev,
|
|
"ALI15X3 not detected, module not inserted.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* set up the sysfs linkage to our parent device */
|
|
ali15x3_adapter.dev.parent = &dev->dev;
|
|
|
|
snprintf(ali15x3_adapter.name, sizeof(ali15x3_adapter.name),
|
|
"SMBus ALI15X3 adapter at %04x", ali15x3_smba);
|
|
return i2c_add_adapter(&ali15x3_adapter);
|
|
}
|
|
|
|
static void __devexit ali15x3_remove(struct pci_dev *dev)
|
|
{
|
|
i2c_del_adapter(&ali15x3_adapter);
|
|
release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
|
|
}
|
|
|
|
static struct pci_driver ali15x3_driver = {
|
|
.name = "ali15x3_smbus",
|
|
.id_table = ali15x3_ids,
|
|
.probe = ali15x3_probe,
|
|
.remove = __devexit_p(ali15x3_remove),
|
|
};
|
|
|
|
module_pci_driver(ali15x3_driver);
|
|
|
|
MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, "
|
|
"Philip Edelbrock <phil@netroedge.com>, "
|
|
"and Mark D. Studebaker <mdsxyz123@yahoo.com>");
|
|
MODULE_DESCRIPTION("ALI15X3 SMBus driver");
|
|
MODULE_LICENSE("GPL");
|