![James Hogan](/assets/img/avatar_default.png)
Log core clock and Meta timer frequencies during init in architecture generic code, removing the need for equivalent log messages in SoC specific code. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
201 lines
5.3 KiB
C
201 lines
5.3 KiB
C
/*
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* Copyright (C) 2005-2013 Imagination Technologies Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*
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* Support for Meta per-thread timers.
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*
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* Meta hardware threads have 2 timers. The background timer (TXTIMER) is used
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* as a free-running time base (hz clocksource), and the interrupt timer
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* (TXTIMERI) is used for the timer interrupt (clock event). Both counters
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* traditionally count at approximately 1MHz.
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*/
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#include <clocksource/metag_generic.h>
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#include <linux/cpu.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/proc_fs.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <asm/clock.h>
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#include <asm/hwthread.h>
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#include <asm/core_reg.h>
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#include <asm/metag_mem.h>
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#include <asm/tbx.h>
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#define HARDWARE_FREQ 1000000 /* 1MHz */
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#define HARDWARE_DIV 1 /* divide by 1 = 1MHz clock */
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#define HARDWARE_TO_NS_SHIFT 10 /* convert ticks to ns */
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static unsigned int hwtimer_freq = HARDWARE_FREQ;
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static DEFINE_PER_CPU(struct clock_event_device, local_clockevent);
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static DEFINE_PER_CPU(char [11], local_clockevent_name);
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static int metag_timer_set_next_event(unsigned long delta,
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struct clock_event_device *dev)
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{
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__core_reg_set(TXTIMERI, -delta);
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return 0;
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}
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static void metag_timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_RESUME:
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break;
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case CLOCK_EVT_MODE_SHUTDOWN:
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/* We should disable the IRQ here */
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break;
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case CLOCK_EVT_MODE_PERIODIC:
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case CLOCK_EVT_MODE_UNUSED:
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WARN_ON(1);
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break;
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};
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}
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static cycle_t metag_clocksource_read(struct clocksource *cs)
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{
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return __core_reg_get(TXTIMER);
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}
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static struct clocksource clocksource_metag = {
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.name = "META",
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.rating = 200,
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.mask = CLOCKSOURCE_MASK(32),
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.read = metag_clocksource_read,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static irqreturn_t metag_timer_interrupt(int irq, void *dummy)
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{
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struct clock_event_device *evt = &__get_cpu_var(local_clockevent);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction metag_timer_irq = {
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.name = "META core timer",
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.handler = metag_timer_interrupt,
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.flags = IRQF_TIMER | IRQF_IRQPOLL | IRQF_PERCPU,
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};
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unsigned long long sched_clock(void)
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{
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unsigned long long ticks = __core_reg_get(TXTIMER);
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return ticks << HARDWARE_TO_NS_SHIFT;
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}
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static void __cpuinit arch_timer_setup(unsigned int cpu)
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{
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unsigned int txdivtime;
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struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
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char *name = per_cpu(local_clockevent_name, cpu);
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txdivtime = __core_reg_get(TXDIVTIME);
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txdivtime &= ~TXDIVTIME_DIV_BITS;
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txdivtime |= (HARDWARE_DIV & TXDIVTIME_DIV_BITS);
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__core_reg_set(TXDIVTIME, txdivtime);
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sprintf(name, "META %d", cpu);
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clk->name = name;
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clk->features = CLOCK_EVT_FEAT_ONESHOT,
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clk->rating = 200,
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clk->shift = 12,
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clk->irq = tbisig_map(TBID_SIGNUM_TRT),
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clk->set_mode = metag_timer_set_mode,
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clk->set_next_event = metag_timer_set_next_event,
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clk->mult = div_sc(hwtimer_freq, NSEC_PER_SEC, clk->shift);
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clk->max_delta_ns = clockevent_delta2ns(0x7fffffff, clk);
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clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
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clk->cpumask = cpumask_of(cpu);
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clockevents_register_device(clk);
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/*
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* For all non-boot CPUs we need to synchronize our free
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* running clock (TXTIMER) with the boot CPU's clock.
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*
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* While this won't be accurate, it should be close enough.
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*/
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if (cpu) {
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unsigned int thread0 = cpu_2_hwthread_id[0];
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unsigned long val;
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val = core_reg_read(TXUCT_ID, TXTIMER_REGNUM, thread0);
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__core_reg_set(TXTIMER, val);
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}
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}
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static int __cpuinit arch_timer_cpu_notify(struct notifier_block *self,
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unsigned long action, void *hcpu)
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{
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int cpu = (long)hcpu;
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switch (action) {
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case CPU_STARTING:
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case CPU_STARTING_FROZEN:
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arch_timer_setup(cpu);
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break;
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}
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return NOTIFY_OK;
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}
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static struct notifier_block __cpuinitdata arch_timer_cpu_nb = {
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.notifier_call = arch_timer_cpu_notify,
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};
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int __init metag_generic_timer_init(void)
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{
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/*
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* On Meta 2 SoCs, the actual frequency of the timer is based on the
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* Meta core clock speed divided by an integer, so it is only
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* approximately 1MHz. Calculating the real frequency here drastically
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* reduces clock skew on these SoCs.
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*/
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#ifdef CONFIG_METAG_META21
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hwtimer_freq = get_coreclock() / (metag_in32(EXPAND_TIMER_DIV) + 1);
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#endif
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pr_info("Timer frequency: %u Hz\n", hwtimer_freq);
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clocksource_register_hz(&clocksource_metag, hwtimer_freq);
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setup_irq(tbisig_map(TBID_SIGNUM_TRT), &metag_timer_irq);
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/* Configure timer on boot CPU */
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arch_timer_setup(smp_processor_id());
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/* Hook cpu boot to configure other CPU's timers */
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register_cpu_notifier(&arch_timer_cpu_nb);
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return 0;
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}
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