![Linus Torvalds](/assets/img/avatar_default.png)
A handful of driver-related changes. We've had a bunch of them going in through
other branches as well, so it's only a part of what we really have this release.
Larger pieces are:
* Removal of a now unused PWM driver for atmel
- This includes AVR32 changes that have been appropriately acked.
* Performance counter support for the arm CCN interconnect
* OMAP mailbox driver cleanups and consolidation
* PCI and SATA PHY drivers for SPEAr 13xx platforms
* Redefinition (with backwards compatibility!) of PCI DT bindings for Tegra to
better model regulators/power.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJT5DrJAAoJEIwa5zzehBx3wkkP/iwEfEK5mMon9KEe4DcKTKNq
Z6xyWuMQNHKdfBFpABs6AsHQCKDc7KK6gN3+2zLLHEJ4XGDPZ2g2NaX3oRPJlaay
BDK7rQfIZyi4tmbOnlEv1BDTYgirYBPMwk9RyNo/04Ug3W+Y67aSVo44zkNFBWaJ
GbcX/zYsrsfvdawuQMW6V/A835s3Kq5Zhv1ikPr8gDDjswZRBAT6i7FYpBSHQ8K8
bH6C1891Xit6rxXSLXJyrtM8CAet7PtLTqNr/IKdUaJnGD+fJm5EonxW+g8gvhN8
gOEkm3nM60++kdDlzZCQVNr0m1+ih6NNCr6bDLO6rIRpAJM2O+YrN1rWuZaJOu1A
pIvifk+wWHT+o52pXk8g9fK4n/ZJydK3IBzDePHMrIROOEiW5tLE3WA+u3NSfMfH
WegMt9E2dcB+5gXPeejZ9gFbAHnh2S1oVTZfCYXtuOHrYiEU9U0FA3eRYvJEE2po
k8sdiOn7Vc65O1QZ+xZNbLABpAHaye7X2evOJyhSutzHE/AtUvT4vuCAZ0tggXyD
E1qVKngVW/NvcoFbwYeidq4bOVgiAEn3idZgF5gEq1mq7LzetXUQAcZAOQfLWHLQ
RrXufS7Ez8pSCG74y0AFReVfQH2PgWHPqGUGj99NXgQauexc/vR1Hc5Iqb8liGNJ
n6i8RqvvQ4KYcmHEXDIT
=fsP6
-----END PGP SIGNATURE-----
Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver changes from Olof Johansson:
"A handful of driver-related changes. We've had a bunch of them going
in through other branches as well, so it's only a part of what we
really have this release.
Larger pieces are:
- Removal of a now unused PWM driver for atmel
[ This includes AVR32 changes that have been appropriately acked ]
- Performance counter support for the arm CCN interconnect
- OMAP mailbox driver cleanups and consolidation
- PCI and SATA PHY drivers for SPEAr 13xx platforms
- Redefinition (with backwards compatibility!) of PCI DT bindings for
Tegra to better model regulators/power"
Note: this merge also fixes up the semantic conflict with the new
calling convention for devm_phy_create(), see commit f0ed817638
("phy:
core: Let node ptr of PHY point to PHY and not of PHY provider") that
came in through Greg's USB tree.
Semantic merge patch by Stephen Rothwell <sfr@canb.auug.org.au> through
the next tree.
* tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
bus: arm-ccn: Fix error handling at event allocation
mailbox/omap: add a parent structure for every IP instance
mailbox/omap: remove the private mailbox structure
mailbox/omap: consolidate OMAP mailbox driver
mailbox/omap: simplify the fifo assignment by using macros
mailbox/omap: remove omap_mbox_type_t from mailbox ops
mailbox/omap: remove OMAP1 mailbox driver
mailbox/omap: use devm_* interfaces
bus: ARM CCN: add PERF_EVENTS dependency
bus: ARM CCN PMU driver
PCI: spear: Remove spear13xx_pcie_remove()
PCI: spear: Fix Section mismatch compilation warning for probe()
ARM: tegra: Remove legacy PCIe power supply properties
PCI: tegra: Remove deprecated power supply properties
PCI: tegra: Implement accurate power supply scheme
ARM: SPEAr13xx: Update defconfigs
ARM: SPEAr13xx: Add pcie and miphy DT nodes
ARM: SPEAr13xx: Add bindings and dt node for misc block
ARM: SPEAr13xx: Fix static mapping table
phy: Add drivers for PCIe and SATA phy on SPEAr13xx
...
129 lines
3.2 KiB
C
129 lines
3.2 KiB
C
/*
|
|
* arch/arm/mach-spear13xx/spear13xx.c
|
|
*
|
|
* SPEAr13XX machines common source file
|
|
*
|
|
* Copyright (C) 2012 ST Microelectronics
|
|
* Viresh Kumar <viresh.linux@gmail.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
#define pr_fmt(fmt) "SPEAr13xx: " fmt
|
|
|
|
#include <linux/amba/pl022.h>
|
|
#include <linux/clk.h>
|
|
#include <linux/clocksource.h>
|
|
#include <linux/err.h>
|
|
#include <linux/of.h>
|
|
#include <asm/hardware/cache-l2x0.h>
|
|
#include <asm/mach/map.h>
|
|
#include <mach/spear.h>
|
|
#include "generic.h"
|
|
|
|
void __init spear13xx_l2x0_init(void)
|
|
{
|
|
/*
|
|
* 512KB (64KB/way), 8-way associativity, parity supported
|
|
*
|
|
* FIXME: 9th bit, of Auxillary Controller register must be set
|
|
* for some spear13xx devices for stable L2 operation.
|
|
*
|
|
* Enable Early BRESP, L2 prefetch for Instruction and Data,
|
|
* write alloc and 'Full line of zero' options
|
|
*
|
|
*/
|
|
if (!IS_ENABLED(CONFIG_CACHE_L2X0))
|
|
return;
|
|
|
|
writel_relaxed(0x06, VA_L2CC_BASE + L310_PREFETCH_CTRL);
|
|
|
|
/*
|
|
* Program following latencies in order to make
|
|
* SPEAr1340 work at 600 MHz
|
|
*/
|
|
writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL);
|
|
writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL);
|
|
l2x0_init(VA_L2CC_BASE, 0x30a00001, 0xfe0fffff);
|
|
}
|
|
|
|
/*
|
|
* Following will create 16MB static virtual/physical mappings
|
|
* PHYSICAL VIRTUAL
|
|
* 0xB3000000 0xF9000000
|
|
* 0xE0000000 0xFD000000
|
|
* 0xEC000000 0xFC000000
|
|
* 0xED000000 0xFB000000
|
|
*/
|
|
static struct map_desc spear13xx_io_desc[] __initdata = {
|
|
{
|
|
.virtual = (unsigned long)VA_PERIP_GRP2_BASE,
|
|
.pfn = __phys_to_pfn(PERIP_GRP2_BASE),
|
|
.length = SZ_16M,
|
|
.type = MT_DEVICE
|
|
}, {
|
|
.virtual = (unsigned long)VA_PERIP_GRP1_BASE,
|
|
.pfn = __phys_to_pfn(PERIP_GRP1_BASE),
|
|
.length = SZ_16M,
|
|
.type = MT_DEVICE
|
|
}, {
|
|
.virtual = (unsigned long)VA_A9SM_AND_MPMC_BASE,
|
|
.pfn = __phys_to_pfn(A9SM_AND_MPMC_BASE),
|
|
.length = SZ_16M,
|
|
.type = MT_DEVICE
|
|
}, {
|
|
.virtual = (unsigned long)VA_L2CC_BASE,
|
|
.pfn = __phys_to_pfn(L2CC_BASE),
|
|
.length = SZ_4K,
|
|
.type = MT_DEVICE
|
|
},
|
|
};
|
|
|
|
/* This will create static memory mapping for selected devices */
|
|
void __init spear13xx_map_io(void)
|
|
{
|
|
iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc));
|
|
}
|
|
|
|
static void __init spear13xx_clk_init(void)
|
|
{
|
|
if (of_machine_is_compatible("st,spear1310"))
|
|
spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE);
|
|
else if (of_machine_is_compatible("st,spear1340"))
|
|
spear1340_clk_init(VA_MISC_BASE);
|
|
else
|
|
pr_err("%s: Unknown machine\n", __func__);
|
|
}
|
|
|
|
void __init spear13xx_timer_init(void)
|
|
{
|
|
char pclk_name[] = "osc_24m_clk";
|
|
struct clk *gpt_clk, *pclk;
|
|
|
|
spear13xx_clk_init();
|
|
|
|
/* get the system timer clock */
|
|
gpt_clk = clk_get_sys("gpt0", NULL);
|
|
if (IS_ERR(gpt_clk)) {
|
|
pr_err("%s:couldn't get clk for gpt\n", __func__);
|
|
BUG();
|
|
}
|
|
|
|
/* get the suitable parent clock for timer*/
|
|
pclk = clk_get(NULL, pclk_name);
|
|
if (IS_ERR(pclk)) {
|
|
pr_err("%s:couldn't get %s as parent for gpt\n", __func__,
|
|
pclk_name);
|
|
BUG();
|
|
}
|
|
|
|
clk_set_parent(gpt_clk, pclk);
|
|
clk_put(gpt_clk);
|
|
clk_put(pclk);
|
|
|
|
spear_setup_of_timer();
|
|
clocksource_of_init();
|
|
}
|