e4a84be6f0
The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights Landing) has an erratum where a processor thread setting the Accessed or Dirty bits may not do so atomically against its checks for the Present bit. This may cause a thread (which is about to page fault) to set A and/or D, even though the Present bit had already been atomically cleared. These bits are truly "stray". In the case of the Dirty bit, the thread associated with the stray set was *not* allowed to write to the page. This means that we do not have to launder the bit(s); we can simply ignore them. If the PTE is used for storing a swap index or a NUMA migration index, the A bit could be misinterpreted as part of the swap type. The stray bits being set cause a software-cleared PTE to be interpreted as a swap entry. In some cases (like when the swap index ends up being for a non-existent swapfile), the kernel detects the stray value and WARN()s about it, but there is no guarantee that the kernel can always detect it. When we have 64-bit PTEs (64-bit mode or 32-bit PAE), we were able to move the swap PTE format around to avoid these troublesome bits. But, 32-bit non-PAE is tight on bits. So, disallow it from running on this hardware. I can't imagine anyone wanting to run 32-bit non-highmem kernels on this hardware, but disallowing them from running entirely is surely the safe thing to do. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave@sr71.net> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Luis R. Rodriguez <mcgrof@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Toshi Kani <toshi.kani@hp.com> Cc: dave.hansen@intel.com Cc: linux-mm@kvack.org Cc: mhocko@suse.com Link: http://lkml.kernel.org/r/20160708001914.D0B50110@viggo.jf.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
102 lines
2.1 KiB
C
102 lines
2.1 KiB
C
/* -*- linux-c -*- ------------------------------------------------------- *
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*
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* Copyright (C) 1991, 1992 Linus Torvalds
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* Copyright 2007-2008 rPath, Inc. - All Rights Reserved
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*
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* This file is part of the Linux kernel, and is made available under
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* the terms of the GNU General Public License version 2.
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*
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* ----------------------------------------------------------------------- */
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/*
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* arch/x86/boot/cpu.c
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*
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* Check for obligatory CPU features and abort if the features are not
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* present.
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*/
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#include "boot.h"
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#ifdef CONFIG_X86_FEATURE_NAMES
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#include "cpustr.h"
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#endif
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static char *cpu_name(int level)
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{
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static char buf[6];
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if (level == 64) {
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return "x86-64";
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} else {
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if (level == 15)
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level = 6;
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sprintf(buf, "i%d86", level);
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return buf;
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}
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}
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static void show_cap_strs(u32 *err_flags)
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{
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int i, j;
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#ifdef CONFIG_X86_FEATURE_NAMES
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const unsigned char *msg_strs = (const unsigned char *)x86_cap_strs;
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for (i = 0; i < NCAPINTS; i++) {
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u32 e = err_flags[i];
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for (j = 0; j < 32; j++) {
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if (msg_strs[0] < i ||
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(msg_strs[0] == i && msg_strs[1] < j)) {
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/* Skip to the next string */
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msg_strs += 2;
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while (*msg_strs++)
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;
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}
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if (e & 1) {
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if (msg_strs[0] == i &&
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msg_strs[1] == j &&
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msg_strs[2])
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printf("%s ", msg_strs+2);
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else
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printf("%d:%d ", i, j);
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}
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e >>= 1;
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}
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}
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#else
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for (i = 0; i < NCAPINTS; i++) {
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u32 e = err_flags[i];
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for (j = 0; j < 32; j++) {
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if (e & 1)
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printf("%d:%d ", i, j);
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e >>= 1;
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}
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}
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#endif
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}
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int validate_cpu(void)
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{
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u32 *err_flags;
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int cpu_level, req_level;
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check_cpu(&cpu_level, &req_level, &err_flags);
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if (cpu_level < req_level) {
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printf("This kernel requires an %s CPU, ",
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cpu_name(req_level));
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printf("but only detected an %s CPU.\n",
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cpu_name(cpu_level));
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return -1;
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}
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if (err_flags) {
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puts("This kernel requires the following features "
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"not present on the CPU:\n");
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show_cap_strs(err_flags);
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putchar('\n');
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return -1;
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} else if (check_knl_erratum()) {
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return -1;
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} else {
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return 0;
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}
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}
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