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597 lines
23 KiB
Plaintext
597 lines
23 KiB
Plaintext
The MSI Driver Guide HOWTO
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Tom L Nguyen tom.l.nguyen@intel.com
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10/03/2003
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Revised Feb 12, 2004 by Martine Silbermann
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email: Martine.Silbermann@hp.com
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Revised Jun 25, 2004 by Tom L Nguyen
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Revised Jul 9, 2008 by Matthew Wilcox <willy@linux.intel.com>
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Copyright 2003, 2008 Intel Corporation
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1. About this guide
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This guide describes the basics of Message Signaled Interrupts (MSIs),
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the advantages of using MSI over traditional interrupt mechanisms, how
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to change your driver to use MSI or MSI-X and some basic diagnostics to
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try if a device doesn't support MSIs.
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2. What are MSIs?
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A Message Signaled Interrupt is a write from the device to a special
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address which causes an interrupt to be received by the CPU.
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The MSI capability was first specified in PCI 2.2 and was later enhanced
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in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
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capability was also introduced with PCI 3.0. It supports more interrupts
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per device than MSI and allows interrupts to be independently configured.
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Devices may support both MSI and MSI-X, but only one can be enabled at
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a time.
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3. Why use MSIs?
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There are three reasons why using MSIs can give an advantage over
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traditional pin-based interrupts.
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Pin-based PCI interrupts are often shared amongst several devices.
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To support this, the kernel must call each interrupt handler associated
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with an interrupt, which leads to reduced performance for the system as
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a whole. MSIs are never shared, so this problem cannot arise.
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When a device writes data to memory, then raises a pin-based interrupt,
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it is possible that the interrupt may arrive before all the data has
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arrived in memory (this becomes more likely with devices behind PCI-PCI
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bridges). In order to ensure that all the data has arrived in memory,
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the interrupt handler must read a register on the device which raised
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the interrupt. PCI transaction ordering rules require that all the data
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arrive in memory before the value may be returned from the register.
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Using MSIs avoids this problem as the interrupt-generating write cannot
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pass the data writes, so by the time the interrupt is raised, the driver
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knows that all the data has arrived in memory.
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PCI devices can only support a single pin-based interrupt per function.
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Often drivers have to query the device to find out what event has
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occurred, slowing down interrupt handling for the common case. With
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MSIs, a device can support more interrupts, allowing each interrupt
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to be specialised to a different purpose. One possible design gives
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infrequent conditions (such as errors) their own interrupt which allows
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the driver to handle the normal interrupt handling path more efficiently.
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Other possible designs include giving one interrupt to each packet queue
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in a network card or each port in a storage controller.
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4. How to use MSIs
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PCI devices are initialised to use pin-based interrupts. The device
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driver has to set up the device to use MSI or MSI-X. Not all machines
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support MSIs correctly, and for those machines, the APIs described below
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will simply fail and the device will continue to use pin-based interrupts.
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4.1 Include kernel support for MSIs
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To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
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option enabled. This option is only available on some architectures,
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and it may depend on some other options also being set. For example,
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on x86, you must also enable X86_UP_APIC or SMP in order to see the
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CONFIG_PCI_MSI option.
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4.2 Using MSI
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Most of the hard work is done for the driver in the PCI layer. It simply
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has to request that the PCI layer set up the MSI capability for this
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device.
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4.2.1 pci_enable_msi
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int pci_enable_msi(struct pci_dev *dev)
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A successful call allocates ONE interrupt to the device, regardless
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of how many MSIs the device supports. The device is switched from
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pin-based interrupt mode to MSI mode. The dev->irq number is changed
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to a new number which represents the message signaled interrupt;
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consequently, this function should be called before the driver calls
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request_irq(), because an MSI is delivered via a vector that is
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different from the vector of a pin-based interrupt.
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4.2.2 pci_enable_msi_range
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int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
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This function allows a device driver to request any number of MSI
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interrupts within specified range from 'minvec' to 'maxvec'.
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If this function returns a positive number it indicates the number of
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MSI interrupts that have been successfully allocated. In this case
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the device is switched from pin-based interrupt mode to MSI mode and
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updates dev->irq to be the lowest of the new interrupts assigned to it.
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The other interrupts assigned to the device are in the range dev->irq
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to dev->irq + returned value - 1. Device driver can use the returned
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number of successfully allocated MSI interrupts to further allocate
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and initialize device resources.
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If this function returns a negative number, it indicates an error and
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the driver should not attempt to request any more MSI interrupts for
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this device.
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This function should be called before the driver calls request_irq(),
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because MSI interrupts are delivered via vectors that are different
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from the vector of a pin-based interrupt.
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It is ideal if drivers can cope with a variable number of MSI interrupts;
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there are many reasons why the platform may not be able to provide the
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exact number that a driver asks for.
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There could be devices that can not operate with just any number of MSI
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interrupts within a range. See chapter 4.3.1.3 to get the idea how to
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handle such devices for MSI-X - the same logic applies to MSI.
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4.2.1.1 Maximum possible number of MSI interrupts
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The typical usage of MSI interrupts is to allocate as many vectors as
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possible, likely up to the limit returned by pci_msi_vec_count() function:
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static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
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{
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return pci_enable_msi_range(pdev, 1, nvec);
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}
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Note the value of 'minvec' parameter is 1. As 'minvec' is inclusive,
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the value of 0 would be meaningless and could result in error.
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Some devices have a minimal limit on number of MSI interrupts.
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In this case the function could look like this:
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static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
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{
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return pci_enable_msi_range(pdev, FOO_DRIVER_MINIMUM_NVEC, nvec);
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}
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4.2.1.2 Exact number of MSI interrupts
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If a driver is unable or unwilling to deal with a variable number of MSI
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interrupts it could request a particular number of interrupts by passing
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that number to pci_enable_msi_range() function as both 'minvec' and 'maxvec'
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parameters:
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static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
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{
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return pci_enable_msi_range(pdev, nvec, nvec);
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}
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Note, unlike pci_enable_msi_exact() function, which could be also used to
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enable a particular number of MSI-X interrupts, pci_enable_msi_range()
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returns either a negative errno or 'nvec' (not negative errno or 0 - as
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pci_enable_msi_exact() does).
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4.2.1.3 Single MSI mode
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The most notorious example of the request type described above is
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enabling the single MSI mode for a device. It could be done by passing
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two 1s as 'minvec' and 'maxvec':
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static int foo_driver_enable_single_msi(struct pci_dev *pdev)
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{
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return pci_enable_msi_range(pdev, 1, 1);
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}
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Note, unlike pci_enable_msi() function, which could be also used to
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enable the single MSI mode, pci_enable_msi_range() returns either a
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negative errno or 1 (not negative errno or 0 - as pci_enable_msi()
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does).
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4.2.3 pci_enable_msi_exact
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int pci_enable_msi_exact(struct pci_dev *dev, int nvec)
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This variation on pci_enable_msi_range() call allows a device driver to
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request exactly 'nvec' MSIs.
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If this function returns a negative number, it indicates an error and
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the driver should not attempt to request any more MSI interrupts for
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this device.
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By contrast with pci_enable_msi_range() function, pci_enable_msi_exact()
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returns zero in case of success, which indicates MSI interrupts have been
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successfully allocated.
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4.2.4 pci_disable_msi
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void pci_disable_msi(struct pci_dev *dev)
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This function should be used to undo the effect of pci_enable_msi_range().
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Calling it restores dev->irq to the pin-based interrupt number and frees
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the previously allocated MSIs. The interrupts may subsequently be assigned
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to another device, so drivers should not cache the value of dev->irq.
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Before calling this function, a device driver must always call free_irq()
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on any interrupt for which it previously called request_irq().
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Failure to do so results in a BUG_ON(), leaving the device with
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MSI enabled and thus leaking its vector.
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4.2.4 pci_msi_vec_count
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int pci_msi_vec_count(struct pci_dev *dev)
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This function could be used to retrieve the number of MSI vectors the
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device requested (via the Multiple Message Capable register). The MSI
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specification only allows the returned value to be a power of two,
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up to a maximum of 2^5 (32).
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If this function returns a negative number, it indicates the device is
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not capable of sending MSIs.
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If this function returns a positive number, it indicates the maximum
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number of MSI interrupt vectors that could be allocated.
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4.3 Using MSI-X
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The MSI-X capability is much more flexible than the MSI capability.
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It supports up to 2048 interrupts, each of which can be controlled
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independently. To support this flexibility, drivers must use an array of
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`struct msix_entry':
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struct msix_entry {
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u16 vector; /* kernel uses to write alloc vector */
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u16 entry; /* driver uses to specify entry */
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};
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This allows for the device to use these interrupts in a sparse fashion;
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for example, it could use interrupts 3 and 1027 and yet allocate only a
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two-element array. The driver is expected to fill in the 'entry' value
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in each element of the array to indicate for which entries the kernel
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should assign interrupts; it is invalid to fill in two entries with the
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same number.
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4.3.1 pci_enable_msix_range
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int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
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int minvec, int maxvec)
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Calling this function asks the PCI subsystem to allocate any number of
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MSI-X interrupts within specified range from 'minvec' to 'maxvec'.
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The 'entries' argument is a pointer to an array of msix_entry structs
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which should be at least 'maxvec' entries in size.
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On success, the device is switched into MSI-X mode and the function
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returns the number of MSI-X interrupts that have been successfully
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allocated. In this case the 'vector' member in entries numbered from
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0 to the returned value - 1 is populated with the interrupt number;
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the driver should then call request_irq() for each 'vector' that it
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decides to use. The device driver is responsible for keeping track of the
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interrupts assigned to the MSI-X vectors so it can free them again later.
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Device driver can use the returned number of successfully allocated MSI-X
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interrupts to further allocate and initialize device resources.
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If this function returns a negative number, it indicates an error and
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the driver should not attempt to allocate any more MSI-X interrupts for
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this device.
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This function, in contrast with pci_enable_msi_range(), does not adjust
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dev->irq. The device will not generate interrupts for this interrupt
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number once MSI-X is enabled.
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Device drivers should normally call this function once per device
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during the initialization phase.
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It is ideal if drivers can cope with a variable number of MSI-X interrupts;
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there are many reasons why the platform may not be able to provide the
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exact number that a driver asks for.
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There could be devices that can not operate with just any number of MSI-X
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interrupts within a range. E.g., an network adapter might need let's say
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four vectors per each queue it provides. Therefore, a number of MSI-X
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interrupts allocated should be a multiple of four. In this case interface
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pci_enable_msix_range() can not be used alone to request MSI-X interrupts
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(since it can allocate any number within the range, without any notion of
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the multiple of four) and the device driver should master a custom logic
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to request the required number of MSI-X interrupts.
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4.3.1.1 Maximum possible number of MSI-X interrupts
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The typical usage of MSI-X interrupts is to allocate as many vectors as
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possible, likely up to the limit returned by pci_msix_vec_count() function:
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static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
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{
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return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
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1, nvec);
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}
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Note the value of 'minvec' parameter is 1. As 'minvec' is inclusive,
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the value of 0 would be meaningless and could result in error.
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Some devices have a minimal limit on number of MSI-X interrupts.
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In this case the function could look like this:
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static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
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{
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return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
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FOO_DRIVER_MINIMUM_NVEC, nvec);
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}
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4.3.1.2 Exact number of MSI-X interrupts
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If a driver is unable or unwilling to deal with a variable number of MSI-X
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interrupts it could request a particular number of interrupts by passing
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that number to pci_enable_msix_range() function as both 'minvec' and 'maxvec'
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parameters:
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static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
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{
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return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
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nvec, nvec);
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}
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Note, unlike pci_enable_msix_exact() function, which could be also used to
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enable a particular number of MSI-X interrupts, pci_enable_msix_range()
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returns either a negative errno or 'nvec' (not negative errno or 0 - as
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pci_enable_msix_exact() does).
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4.3.1.3 Specific requirements to the number of MSI-X interrupts
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As noted above, there could be devices that can not operate with just any
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number of MSI-X interrupts within a range. E.g., let's assume a device that
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is only capable sending the number of MSI-X interrupts which is a power of
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two. A routine that enables MSI-X mode for such device might look like this:
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/*
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* Assume 'minvec' and 'maxvec' are non-zero
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*/
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static int foo_driver_enable_msix(struct foo_adapter *adapter,
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int minvec, int maxvec)
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{
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int rc;
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minvec = roundup_pow_of_two(minvec);
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maxvec = rounddown_pow_of_two(maxvec);
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if (minvec > maxvec)
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return -ERANGE;
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retry:
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rc = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
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maxvec, maxvec);
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/*
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* -ENOSPC is the only error code allowed to be analized
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*/
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if (rc == -ENOSPC) {
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if (maxvec == 1)
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return -ENOSPC;
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maxvec /= 2;
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if (minvec > maxvec)
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return -ENOSPC;
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goto retry;
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}
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return rc;
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}
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Note how pci_enable_msix_range() return value is analized for a fallback -
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any error code other than -ENOSPC indicates a fatal error and should not
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be retried.
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4.3.2 pci_enable_msix_exact
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int pci_enable_msix_exact(struct pci_dev *dev,
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struct msix_entry *entries, int nvec)
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This variation on pci_enable_msix_range() call allows a device driver to
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request exactly 'nvec' MSI-Xs.
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If this function returns a negative number, it indicates an error and
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the driver should not attempt to allocate any more MSI-X interrupts for
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this device.
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By contrast with pci_enable_msix_range() function, pci_enable_msix_exact()
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returns zero in case of success, which indicates MSI-X interrupts have been
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successfully allocated.
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Another version of a routine that enables MSI-X mode for a device with
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specific requirements described in chapter 4.3.1.3 might look like this:
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/*
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* Assume 'minvec' and 'maxvec' are non-zero
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*/
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static int foo_driver_enable_msix(struct foo_adapter *adapter,
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int minvec, int maxvec)
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{
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int rc;
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minvec = roundup_pow_of_two(minvec);
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maxvec = rounddown_pow_of_two(maxvec);
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if (minvec > maxvec)
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return -ERANGE;
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retry:
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rc = pci_enable_msix_exact(adapter->pdev,
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adapter->msix_entries, maxvec);
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/*
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* -ENOSPC is the only error code allowed to be analyzed
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*/
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if (rc == -ENOSPC) {
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if (maxvec == 1)
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return -ENOSPC;
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maxvec /= 2;
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if (minvec > maxvec)
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return -ENOSPC;
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goto retry;
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} else if (rc < 0) {
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return rc;
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}
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return maxvec;
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}
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4.3.3 pci_disable_msix
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void pci_disable_msix(struct pci_dev *dev)
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This function should be used to undo the effect of pci_enable_msix_range().
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It frees the previously allocated MSI-X interrupts. The interrupts may
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subsequently be assigned to another device, so drivers should not cache
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the value of the 'vector' elements over a call to pci_disable_msix().
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Before calling this function, a device driver must always call free_irq()
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on any interrupt for which it previously called request_irq().
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Failure to do so results in a BUG_ON(), leaving the device with
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MSI-X enabled and thus leaking its vector.
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4.3.3 The MSI-X Table
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The MSI-X capability specifies a BAR and offset within that BAR for the
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MSI-X Table. This address is mapped by the PCI subsystem, and should not
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be accessed directly by the device driver. If the driver wishes to
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mask or unmask an interrupt, it should call disable_irq() / enable_irq().
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4.3.4 pci_msix_vec_count
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int pci_msix_vec_count(struct pci_dev *dev)
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This function could be used to retrieve number of entries in the device
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MSI-X table.
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If this function returns a negative number, it indicates the device is
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not capable of sending MSI-Xs.
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If this function returns a positive number, it indicates the maximum
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number of MSI-X interrupt vectors that could be allocated.
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4.4 Handling devices implementing both MSI and MSI-X capabilities
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If a device implements both MSI and MSI-X capabilities, it can
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run in either MSI mode or MSI-X mode, but not both simultaneously.
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This is a requirement of the PCI spec, and it is enforced by the
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PCI layer. Calling pci_enable_msi_range() when MSI-X is already
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enabled or pci_enable_msix_range() when MSI is already enabled
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|
results in an error. If a device driver wishes to switch between MSI
|
|
and MSI-X at runtime, it must first quiesce the device, then switch
|
|
it back to pin-interrupt mode, before calling pci_enable_msi_range()
|
|
or pci_enable_msix_range() and resuming operation. This is not expected
|
|
to be a common operation but may be useful for debugging or testing
|
|
during development.
|
|
|
|
4.5 Considerations when using MSIs
|
|
|
|
4.5.1 Choosing between MSI-X and MSI
|
|
|
|
If your device supports both MSI-X and MSI capabilities, you should use
|
|
the MSI-X facilities in preference to the MSI facilities. As mentioned
|
|
above, MSI-X supports any number of interrupts between 1 and 2048.
|
|
In constrast, MSI is restricted to a maximum of 32 interrupts (and
|
|
must be a power of two). In addition, the MSI interrupt vectors must
|
|
be allocated consecutively, so the system might not be able to allocate
|
|
as many vectors for MSI as it could for MSI-X. On some platforms, MSI
|
|
interrupts must all be targeted at the same set of CPUs whereas MSI-X
|
|
interrupts can all be targeted at different CPUs.
|
|
|
|
4.5.2 Spinlocks
|
|
|
|
Most device drivers have a per-device spinlock which is taken in the
|
|
interrupt handler. With pin-based interrupts or a single MSI, it is not
|
|
necessary to disable interrupts (Linux guarantees the same interrupt will
|
|
not be re-entered). If a device uses multiple interrupts, the driver
|
|
must disable interrupts while the lock is held. If the device sends
|
|
a different interrupt, the driver will deadlock trying to recursively
|
|
acquire the spinlock.
|
|
|
|
There are two solutions. The first is to take the lock with
|
|
spin_lock_irqsave() or spin_lock_irq() (see
|
|
Documentation/DocBook/kernel-locking). The second is to specify
|
|
IRQF_DISABLED to request_irq() so that the kernel runs the entire
|
|
interrupt routine with interrupts disabled.
|
|
|
|
If your MSI interrupt routine does not hold the lock for the whole time
|
|
it is running, the first solution may be best. The second solution is
|
|
normally preferred as it avoids making two transitions from interrupt
|
|
disabled to enabled and back again.
|
|
|
|
4.6 How to tell whether MSI/MSI-X is enabled on a device
|
|
|
|
Using 'lspci -v' (as root) may show some devices with "MSI", "Message
|
|
Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities
|
|
has an 'Enable' flag which is followed with either "+" (enabled)
|
|
or "-" (disabled).
|
|
|
|
|
|
5. MSI quirks
|
|
|
|
Several PCI chipsets or devices are known not to support MSIs.
|
|
The PCI stack provides three ways to disable MSIs:
|
|
|
|
1. globally
|
|
2. on all devices behind a specific bridge
|
|
3. on a single device
|
|
|
|
5.1. Disabling MSIs globally
|
|
|
|
Some host chipsets simply don't support MSIs properly. If we're
|
|
lucky, the manufacturer knows this and has indicated it in the ACPI
|
|
FADT table. In this case, Linux automatically disables MSIs.
|
|
Some boards don't include this information in the table and so we have
|
|
to detect them ourselves. The complete list of these is found near the
|
|
quirk_disable_all_msi() function in drivers/pci/quirks.c.
|
|
|
|
If you have a board which has problems with MSIs, you can pass pci=nomsi
|
|
on the kernel command line to disable MSIs on all devices. It would be
|
|
in your best interests to report the problem to linux-pci@vger.kernel.org
|
|
including a full 'lspci -v' so we can add the quirks to the kernel.
|
|
|
|
5.2. Disabling MSIs below a bridge
|
|
|
|
Some PCI bridges are not able to route MSIs between busses properly.
|
|
In this case, MSIs must be disabled on all devices behind the bridge.
|
|
|
|
Some bridges allow you to enable MSIs by changing some bits in their
|
|
PCI configuration space (especially the Hypertransport chipsets such
|
|
as the nVidia nForce and Serverworks HT2000). As with host chipsets,
|
|
Linux mostly knows about them and automatically enables MSIs if it can.
|
|
If you have a bridge unknown to Linux, you can enable
|
|
MSIs in configuration space using whatever method you know works, then
|
|
enable MSIs on that bridge by doing:
|
|
|
|
echo 1 > /sys/bus/pci/devices/$bridge/msi_bus
|
|
|
|
where $bridge is the PCI address of the bridge you've enabled (eg
|
|
0000:00:0e.0).
|
|
|
|
To disable MSIs, echo 0 instead of 1. Changing this value should be
|
|
done with caution as it could break interrupt handling for all devices
|
|
below this bridge.
|
|
|
|
Again, please notify linux-pci@vger.kernel.org of any bridges that need
|
|
special handling.
|
|
|
|
5.3. Disabling MSIs on a single device
|
|
|
|
Some devices are known to have faulty MSI implementations. Usually this
|
|
is handled in the individual device driver, but occasionally it's necessary
|
|
to handle this with a quirk. Some drivers have an option to disable use
|
|
of MSI. While this is a convenient workaround for the driver author,
|
|
it is not good practice, and should not be emulated.
|
|
|
|
5.4. Finding why MSIs are disabled on a device
|
|
|
|
From the above three sections, you can see that there are many reasons
|
|
why MSIs may not be enabled for a given device. Your first step should
|
|
be to examine your dmesg carefully to determine whether MSIs are enabled
|
|
for your machine. You should also check your .config to be sure you
|
|
have enabled CONFIG_PCI_MSI.
|
|
|
|
Then, 'lspci -t' gives the list of bridges above a device. Reading
|
|
/sys/bus/pci/devices/*/msi_bus will tell you whether MSIs are enabled (1)
|
|
or disabled (0). If 0 is found in any of the msi_bus files belonging
|
|
to bridges between the PCI root and the device, MSIs are disabled.
|
|
|
|
It is also worth checking the device driver to see whether it supports MSIs.
|
|
For example, it may contain calls to pci_enable_msi_range() or
|
|
pci_enable_msix_range().
|