![Jan Kiszka](/assets/img/avatar_default.png)
of_pci_get_host_bridge_resources() allocates the resource structures it fills dynamically, but none of its callers care to release them so far. Rather than requiring everyone to do this explicitly, convert the existing function to a managed version. Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
643 lines
17 KiB
C
643 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* PCI <-> OF mapping helpers
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*
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* Copyright 2011 IBM Corp.
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*/
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#define pr_fmt(fmt) "PCI: OF: " fmt
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_pci.h>
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#include "pci.h"
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void pci_set_of_node(struct pci_dev *dev)
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{
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if (!dev->bus->dev.of_node)
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return;
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dev->dev.of_node = of_pci_find_child_device(dev->bus->dev.of_node,
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dev->devfn);
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}
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void pci_release_of_node(struct pci_dev *dev)
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{
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of_node_put(dev->dev.of_node);
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dev->dev.of_node = NULL;
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}
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void pci_set_bus_of_node(struct pci_bus *bus)
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{
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if (bus->self == NULL)
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bus->dev.of_node = pcibios_get_phb_of_node(bus);
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else
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bus->dev.of_node = of_node_get(bus->self->dev.of_node);
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}
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void pci_release_bus_of_node(struct pci_bus *bus)
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{
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of_node_put(bus->dev.of_node);
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bus->dev.of_node = NULL;
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}
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struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus)
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{
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/* This should only be called for PHBs */
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if (WARN_ON(bus->self || bus->parent))
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return NULL;
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/*
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* Look for a node pointer in either the intermediary device we
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* create above the root bus or its own parent. Normally only
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* the later is populated.
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*/
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if (bus->bridge->of_node)
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return of_node_get(bus->bridge->of_node);
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if (bus->bridge->parent && bus->bridge->parent->of_node)
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return of_node_get(bus->bridge->parent->of_node);
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return NULL;
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}
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struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus)
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{
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#ifdef CONFIG_IRQ_DOMAIN
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struct irq_domain *d;
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if (!bus->dev.of_node)
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return NULL;
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/* Start looking for a phandle to an MSI controller. */
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d = of_msi_get_domain(&bus->dev, bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
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if (d)
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return d;
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/*
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* If we don't have an msi-parent property, look for a domain
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* directly attached to the host bridge.
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*/
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d = irq_find_matching_host(bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
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if (d)
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return d;
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return irq_find_host(bus->dev.of_node);
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#else
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return NULL;
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#endif
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}
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static inline int __of_pci_pci_compare(struct device_node *node,
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unsigned int data)
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{
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int devfn;
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devfn = of_pci_get_devfn(node);
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if (devfn < 0)
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return 0;
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return devfn == data;
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}
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struct device_node *of_pci_find_child_device(struct device_node *parent,
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unsigned int devfn)
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{
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struct device_node *node, *node2;
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for_each_child_of_node(parent, node) {
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if (__of_pci_pci_compare(node, devfn))
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return node;
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/*
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* Some OFs create a parent node "multifunc-device" as
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* a fake root for all functions of a multi-function
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* device we go down them as well.
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*/
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if (!strcmp(node->name, "multifunc-device")) {
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for_each_child_of_node(node, node2) {
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if (__of_pci_pci_compare(node2, devfn)) {
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of_node_put(node);
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return node2;
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}
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}
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(of_pci_find_child_device);
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/**
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* of_pci_get_devfn() - Get device and function numbers for a device node
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* @np: device node
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*
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* Parses a standard 5-cell PCI resource and returns an 8-bit value that can
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* be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device
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* and function numbers respectively. On error a negative error code is
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* returned.
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*/
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int of_pci_get_devfn(struct device_node *np)
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{
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u32 reg[5];
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int error;
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error = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));
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if (error)
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return error;
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return (reg[0] >> 8) & 0xff;
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}
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EXPORT_SYMBOL_GPL(of_pci_get_devfn);
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/**
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* of_pci_parse_bus_range() - parse the bus-range property of a PCI device
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* @node: device node
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* @res: address to a struct resource to return the bus-range
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*
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* Returns 0 on success or a negative error-code on failure.
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*/
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int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
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{
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u32 bus_range[2];
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int error;
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error = of_property_read_u32_array(node, "bus-range", bus_range,
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ARRAY_SIZE(bus_range));
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if (error)
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return error;
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res->name = node->name;
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res->start = bus_range[0];
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res->end = bus_range[1];
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res->flags = IORESOURCE_BUS;
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return 0;
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}
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EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
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/**
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* This function will try to obtain the host bridge domain number by
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* finding a property called "linux,pci-domain" of the given device node.
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*
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* @node: device tree node with the domain information
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*
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* Returns the associated domain number from DT in the range [0-0xffff], or
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* a negative value if the required property is not found.
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*/
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int of_get_pci_domain_nr(struct device_node *node)
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{
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u32 domain;
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int error;
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error = of_property_read_u32(node, "linux,pci-domain", &domain);
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if (error)
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return error;
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return (u16)domain;
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}
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EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
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/**
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* This function will try to find the limitation of link speed by finding
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* a property called "max-link-speed" of the given device node.
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*
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* @node: device tree node with the max link speed information
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*
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* Returns the associated max link speed from DT, or a negative value if the
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* required property is not found or is invalid.
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*/
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int of_pci_get_max_link_speed(struct device_node *node)
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{
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u32 max_link_speed;
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if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
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max_link_speed > 4)
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return -EINVAL;
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return max_link_speed;
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}
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EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed);
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/**
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* of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
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* is present and valid
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*/
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void of_pci_check_probe_only(void)
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{
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u32 val;
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int ret;
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ret = of_property_read_u32(of_chosen, "linux,pci-probe-only", &val);
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if (ret) {
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if (ret == -ENODATA || ret == -EOVERFLOW)
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pr_warn("linux,pci-probe-only without valid value, ignoring\n");
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return;
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}
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if (val)
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pci_add_flags(PCI_PROBE_ONLY);
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else
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pci_clear_flags(PCI_PROBE_ONLY);
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pr_info("PROBE_ONLY %sabled\n", val ? "en" : "dis");
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}
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EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
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#if defined(CONFIG_OF_ADDRESS)
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/**
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* devm_of_pci_get_host_bridge_resources() - Resource-managed parsing of PCI
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* host bridge resources from DT
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* @dev: host bridge device
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* @busno: bus number associated with the bridge root bus
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* @bus_max: maximum number of buses for this bridge
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* @resources: list where the range of resources will be added after DT parsing
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* @io_base: pointer to a variable that will contain on return the physical
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* address for the start of the I/O range. Can be NULL if the caller doesn't
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* expect I/O ranges to be present in the device tree.
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*
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* This function will parse the "ranges" property of a PCI host bridge device
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* node and setup the resource mapping based on its content. It is expected
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* that the property conforms with the Power ePAPR document.
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*
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* It returns zero if the range parsing has been successful or a standard error
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* value if it failed.
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*/
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int devm_of_pci_get_host_bridge_resources(struct device *dev,
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unsigned char busno, unsigned char bus_max,
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struct list_head *resources, resource_size_t *io_base)
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{
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struct device_node *dev_node = dev->of_node;
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struct resource *res;
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struct resource *bus_range;
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struct of_pci_range range;
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struct of_pci_range_parser parser;
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char range_type[4];
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int err;
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if (io_base)
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*io_base = (resource_size_t)OF_BAD_ADDR;
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bus_range = devm_kzalloc(dev, sizeof(*bus_range), GFP_KERNEL);
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if (!bus_range)
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return -ENOMEM;
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dev_info(dev, "host bridge %pOF ranges:\n", dev_node);
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err = of_pci_parse_bus_range(dev_node, bus_range);
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if (err) {
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bus_range->start = busno;
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bus_range->end = bus_max;
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bus_range->flags = IORESOURCE_BUS;
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dev_info(dev, " No bus range found for %pOF, using %pR\n",
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dev_node, bus_range);
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} else {
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if (bus_range->end > bus_range->start + bus_max)
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bus_range->end = bus_range->start + bus_max;
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}
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pci_add_resource(resources, bus_range);
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/* Check for ranges property */
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err = of_pci_range_parser_init(&parser, dev_node);
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if (err)
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goto failed;
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dev_dbg(dev, "Parsing ranges property...\n");
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for_each_of_pci_range(&parser, &range) {
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/* Read next ranges element */
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if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
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snprintf(range_type, 4, " IO");
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else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
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snprintf(range_type, 4, "MEM");
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else
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snprintf(range_type, 4, "err");
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dev_info(dev, " %s %#010llx..%#010llx -> %#010llx\n",
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range_type, range.cpu_addr,
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range.cpu_addr + range.size - 1, range.pci_addr);
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/*
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* If we failed translation or got a zero-sized region
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* then skip this range
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*/
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if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
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continue;
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res = devm_kzalloc(dev, sizeof(struct resource), GFP_KERNEL);
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if (!res) {
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err = -ENOMEM;
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goto failed;
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}
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err = of_pci_range_to_resource(&range, dev_node, res);
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if (err) {
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devm_kfree(dev, res);
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continue;
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}
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if (resource_type(res) == IORESOURCE_IO) {
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if (!io_base) {
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dev_err(dev, "I/O range found for %pOF. Please provide an io_base pointer to save CPU base address\n",
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dev_node);
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err = -EINVAL;
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goto failed;
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}
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if (*io_base != (resource_size_t)OF_BAD_ADDR)
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dev_warn(dev, "More than one I/O resource converted for %pOF. CPU base address for old range lost!\n",
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dev_node);
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*io_base = range.cpu_addr;
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}
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pci_add_resource_offset(resources, res, res->start - range.pci_addr);
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}
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return 0;
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failed:
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pci_free_resource_list(resources);
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return err;
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}
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EXPORT_SYMBOL_GPL(devm_of_pci_get_host_bridge_resources);
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#endif /* CONFIG_OF_ADDRESS */
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/**
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* of_pci_map_rid - Translate a requester ID through a downstream mapping.
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* @np: root complex device node.
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* @rid: PCI requester ID to map.
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* @map_name: property name of the map to use.
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* @map_mask_name: optional property name of the mask to use.
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* @target: optional pointer to a target device node.
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* @id_out: optional pointer to receive the translated ID.
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*
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* Given a PCI requester ID, look up the appropriate implementation-defined
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* platform ID and/or the target device which receives transactions on that
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* ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or
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* @id_out may be NULL if only the other is required. If @target points to
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* a non-NULL device node pointer, only entries targeting that node will be
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* matched; if it points to a NULL value, it will receive the device node of
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* the first matching target phandle, with a reference held.
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*
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* Return: 0 on success or a standard error code on failure.
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*/
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int of_pci_map_rid(struct device_node *np, u32 rid,
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const char *map_name, const char *map_mask_name,
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struct device_node **target, u32 *id_out)
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{
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u32 map_mask, masked_rid;
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int map_len;
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const __be32 *map = NULL;
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if (!np || !map_name || (!target && !id_out))
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return -EINVAL;
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map = of_get_property(np, map_name, &map_len);
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if (!map) {
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if (target)
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return -ENODEV;
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/* Otherwise, no map implies no translation */
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*id_out = rid;
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return 0;
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}
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if (!map_len || map_len % (4 * sizeof(*map))) {
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pr_err("%pOF: Error: Bad %s length: %d\n", np,
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map_name, map_len);
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return -EINVAL;
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}
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/* The default is to select all bits. */
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map_mask = 0xffffffff;
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/*
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* Can be overridden by "{iommu,msi}-map-mask" property.
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* If of_property_read_u32() fails, the default is used.
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*/
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if (map_mask_name)
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of_property_read_u32(np, map_mask_name, &map_mask);
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masked_rid = map_mask & rid;
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for ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) {
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struct device_node *phandle_node;
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u32 rid_base = be32_to_cpup(map + 0);
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u32 phandle = be32_to_cpup(map + 1);
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u32 out_base = be32_to_cpup(map + 2);
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u32 rid_len = be32_to_cpup(map + 3);
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if (rid_base & ~map_mask) {
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pr_err("%pOF: Invalid %s translation - %s-mask (0x%x) ignores rid-base (0x%x)\n",
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np, map_name, map_name,
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map_mask, rid_base);
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return -EFAULT;
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}
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if (masked_rid < rid_base || masked_rid >= rid_base + rid_len)
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continue;
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phandle_node = of_find_node_by_phandle(phandle);
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if (!phandle_node)
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return -ENODEV;
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if (target) {
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if (*target)
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of_node_put(phandle_node);
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else
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*target = phandle_node;
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if (*target != phandle_node)
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continue;
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}
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if (id_out)
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*id_out = masked_rid - rid_base + out_base;
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pr_debug("%pOF: %s, using mask %08x, rid-base: %08x, out-base: %08x, length: %08x, rid: %08x -> %08x\n",
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np, map_name, map_mask, rid_base, out_base,
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rid_len, rid, masked_rid - rid_base + out_base);
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return 0;
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}
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pr_err("%pOF: Invalid %s translation - no match for rid 0x%x on %pOF\n",
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np, map_name, rid, target && *target ? *target : NULL);
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return -EFAULT;
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}
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#if IS_ENABLED(CONFIG_OF_IRQ)
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/**
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* of_irq_parse_pci - Resolve the interrupt for a PCI device
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* @pdev: the device whose interrupt is to be resolved
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* @out_irq: structure of_irq filled by this function
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*
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* This function resolves the PCI interrupt for a given PCI device. If a
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* device-node exists for a given pci_dev, it will use normal OF tree
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* walking. If not, it will implement standard swizzling and walk up the
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* PCI tree until an device-node is found, at which point it will finish
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* resolving using the OF tree walking.
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*/
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static int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
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{
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struct device_node *dn, *ppnode;
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struct pci_dev *ppdev;
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__be32 laddr[3];
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u8 pin;
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int rc;
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/*
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* Check if we have a device node, if yes, fallback to standard
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* device tree parsing
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*/
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dn = pci_device_to_OF_node(pdev);
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if (dn) {
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rc = of_irq_parse_one(dn, 0, out_irq);
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|
if (!rc)
|
|
return rc;
|
|
}
|
|
|
|
/*
|
|
* Ok, we don't, time to have fun. Let's start by building up an
|
|
* interrupt spec. we assume #interrupt-cells is 1, which is standard
|
|
* for PCI. If you do different, then don't use that routine.
|
|
*/
|
|
rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
|
|
if (rc != 0)
|
|
goto err;
|
|
/* No pin, exit with no error message. */
|
|
if (pin == 0)
|
|
return -ENODEV;
|
|
|
|
/* Now we walk up the PCI tree */
|
|
for (;;) {
|
|
/* Get the pci_dev of our parent */
|
|
ppdev = pdev->bus->self;
|
|
|
|
/* Ouch, it's a host bridge... */
|
|
if (ppdev == NULL) {
|
|
ppnode = pci_bus_to_OF_node(pdev->bus);
|
|
|
|
/* No node for host bridge ? give up */
|
|
if (ppnode == NULL) {
|
|
rc = -EINVAL;
|
|
goto err;
|
|
}
|
|
} else {
|
|
/* We found a P2P bridge, check if it has a node */
|
|
ppnode = pci_device_to_OF_node(ppdev);
|
|
}
|
|
|
|
/*
|
|
* Ok, we have found a parent with a device-node, hand over to
|
|
* the OF parsing code.
|
|
* We build a unit address from the linux device to be used for
|
|
* resolution. Note that we use the linux bus number which may
|
|
* not match your firmware bus numbering.
|
|
* Fortunately, in most cases, interrupt-map-mask doesn't
|
|
* include the bus number as part of the matching.
|
|
* You should still be careful about that though if you intend
|
|
* to rely on this function (you ship a firmware that doesn't
|
|
* create device nodes for all PCI devices).
|
|
*/
|
|
if (ppnode)
|
|
break;
|
|
|
|
/*
|
|
* We can only get here if we hit a P2P bridge with no node;
|
|
* let's do standard swizzling and try again
|
|
*/
|
|
pin = pci_swizzle_interrupt_pin(pdev, pin);
|
|
pdev = ppdev;
|
|
}
|
|
|
|
out_irq->np = ppnode;
|
|
out_irq->args_count = 1;
|
|
out_irq->args[0] = pin;
|
|
laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
|
|
laddr[1] = laddr[2] = cpu_to_be32(0);
|
|
rc = of_irq_parse_raw(laddr, out_irq);
|
|
if (rc)
|
|
goto err;
|
|
return 0;
|
|
err:
|
|
if (rc == -ENOENT) {
|
|
dev_warn(&pdev->dev,
|
|
"%s: no interrupt-map found, INTx interrupts not available\n",
|
|
__func__);
|
|
pr_warn_once("%s: possibly some PCI slots don't have level triggered interrupts capability\n",
|
|
__func__);
|
|
} else {
|
|
dev_err(&pdev->dev, "%s: failed with rc=%d\n", __func__, rc);
|
|
}
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* of_irq_parse_and_map_pci() - Decode a PCI IRQ from the device tree and map to a VIRQ
|
|
* @dev: The PCI device needing an IRQ
|
|
* @slot: PCI slot number; passed when used as map_irq callback. Unused
|
|
* @pin: PCI IRQ pin number; passed when used as map_irq callback. Unused
|
|
*
|
|
* @slot and @pin are unused, but included in the function so that this
|
|
* function can be used directly as the map_irq callback to
|
|
* pci_assign_irq() and struct pci_host_bridge.map_irq pointer
|
|
*/
|
|
int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
|
|
{
|
|
struct of_phandle_args oirq;
|
|
int ret;
|
|
|
|
ret = of_irq_parse_pci(dev, &oirq);
|
|
if (ret)
|
|
return 0; /* Proper return code 0 == NO_IRQ */
|
|
|
|
return irq_create_of_mapping(&oirq);
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci);
|
|
#endif /* CONFIG_OF_IRQ */
|
|
|
|
int pci_parse_request_of_pci_ranges(struct device *dev,
|
|
struct list_head *resources,
|
|
struct resource **bus_range)
|
|
{
|
|
int err, res_valid = 0;
|
|
resource_size_t iobase;
|
|
struct resource_entry *win, *tmp;
|
|
|
|
INIT_LIST_HEAD(resources);
|
|
err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, resources,
|
|
&iobase);
|
|
if (err)
|
|
return err;
|
|
|
|
err = devm_request_pci_bus_resources(dev, resources);
|
|
if (err)
|
|
goto out_release_res;
|
|
|
|
resource_list_for_each_entry_safe(win, tmp, resources) {
|
|
struct resource *res = win->res;
|
|
|
|
switch (resource_type(res)) {
|
|
case IORESOURCE_IO:
|
|
err = pci_remap_iospace(res, iobase);
|
|
if (err) {
|
|
dev_warn(dev, "error %d: failed to map resource %pR\n",
|
|
err, res);
|
|
resource_list_destroy_entry(win);
|
|
}
|
|
break;
|
|
case IORESOURCE_MEM:
|
|
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
|
|
break;
|
|
case IORESOURCE_BUS:
|
|
if (bus_range)
|
|
*bus_range = res;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (res_valid)
|
|
return 0;
|
|
|
|
dev_err(dev, "non-prefetchable memory resource required\n");
|
|
err = -EINVAL;
|
|
|
|
out_release_res:
|
|
pci_free_resource_list(resources);
|
|
return err;
|
|
}
|
|
|