![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
348 lines
8.5 KiB
C
348 lines
8.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for Conexant Digicolor General Purpose Pin Mapping
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*
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* Author: Baruch Siach <baruch@tkos.co.il>
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*
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* Copyright (C) 2015 Paradox Innovation Ltd.
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*
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* TODO:
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* - GPIO interrupt support
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* - Pin pad configuration (pull up/down, strength)
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/io.h>
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#include <linux/gpio/driver.h>
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#include <linux/spinlock.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include "pinctrl-utils.h"
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#define DRIVER_NAME "pinctrl-digicolor"
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#define GP_CLIENTSEL(clct) ((clct)*8 + 0x20)
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#define GP_DRIVE0(clct) (GP_CLIENTSEL(clct) + 2)
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#define GP_OUTPUT0(clct) (GP_CLIENTSEL(clct) + 3)
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#define GP_INPUT(clct) (GP_CLIENTSEL(clct) + 6)
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#define PIN_COLLECTIONS ('R' - 'A' + 1)
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#define PINS_PER_COLLECTION 8
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#define PINS_COUNT (PIN_COLLECTIONS * PINS_PER_COLLECTION)
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struct dc_pinmap {
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void __iomem *regs;
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struct device *dev;
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struct pinctrl_dev *pctl;
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struct pinctrl_desc *desc;
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const char *pin_names[PINS_COUNT];
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struct gpio_chip chip;
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spinlock_t lock;
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};
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static int dc_get_groups_count(struct pinctrl_dev *pctldev)
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{
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return PINS_COUNT;
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}
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static const char *dc_get_group_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
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/* Exactly one group per pin */
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return pmap->desc->pins[selector].name;
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}
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static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
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const unsigned **pins,
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unsigned *num_pins)
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{
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struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
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*pins = &pmap->desc->pins[selector].number;
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*num_pins = 1;
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return 0;
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}
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static const struct pinctrl_ops dc_pinctrl_ops = {
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.get_groups_count = dc_get_groups_count,
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.get_group_name = dc_get_group_name,
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.get_group_pins = dc_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
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.dt_free_map = pinctrl_utils_free_map,
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};
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static const char *const dc_functions[] = {
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"gpio",
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"client_a",
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"client_b",
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"client_c",
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};
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static int dc_get_functions_count(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(dc_functions);
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}
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static const char *dc_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
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{
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return dc_functions[selector];
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}
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static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
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*groups = pmap->pin_names;
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*num_groups = PINS_COUNT;
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return 0;
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}
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static void dc_client_sel(int pin_num, int *reg, int *bit)
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{
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*bit = (pin_num % PINS_PER_COLLECTION) * 2;
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*reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);
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if (*bit >= PINS_PER_COLLECTION) {
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*bit -= PINS_PER_COLLECTION;
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*reg += 1;
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}
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}
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static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
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unsigned group)
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{
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struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
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int bit_off, reg_off;
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u8 reg;
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dc_client_sel(group, ®_off, &bit_off);
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reg = readb_relaxed(pmap->regs + reg_off);
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reg &= ~(3 << bit_off);
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reg |= (selector << bit_off);
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writeb_relaxed(reg, pmap->regs + reg_off);
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return 0;
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}
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static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
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struct pinctrl_gpio_range *range,
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unsigned offset)
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{
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struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
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int bit_off, reg_off;
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u8 reg;
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dc_client_sel(offset, ®_off, &bit_off);
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reg = readb_relaxed(pmap->regs + reg_off);
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if ((reg & (3 << bit_off)) != 0)
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return -EBUSY;
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return 0;
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}
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static const struct pinmux_ops dc_pmxops = {
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.get_functions_count = dc_get_functions_count,
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.get_function_name = dc_get_fname,
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.get_function_groups = dc_get_groups,
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.set_mux = dc_set_mux,
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.gpio_request_enable = dc_pmx_request_gpio,
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};
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static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
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{
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struct dc_pinmap *pmap = gpiochip_get_data(chip);
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int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
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int bit_off = gpio % PINS_PER_COLLECTION;
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u8 drive;
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unsigned long flags;
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spin_lock_irqsave(&pmap->lock, flags);
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drive = readb_relaxed(pmap->regs + reg_off);
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drive &= ~BIT(bit_off);
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writeb_relaxed(drive, pmap->regs + reg_off);
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spin_unlock_irqrestore(&pmap->lock, flags);
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return 0;
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}
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static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);
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static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
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int value)
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{
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struct dc_pinmap *pmap = gpiochip_get_data(chip);
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int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
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int bit_off = gpio % PINS_PER_COLLECTION;
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u8 drive;
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unsigned long flags;
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dc_gpio_set(chip, gpio, value);
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spin_lock_irqsave(&pmap->lock, flags);
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drive = readb_relaxed(pmap->regs + reg_off);
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drive |= BIT(bit_off);
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writeb_relaxed(drive, pmap->regs + reg_off);
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spin_unlock_irqrestore(&pmap->lock, flags);
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return 0;
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}
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static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
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{
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struct dc_pinmap *pmap = gpiochip_get_data(chip);
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int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
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int bit_off = gpio % PINS_PER_COLLECTION;
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u8 input;
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input = readb_relaxed(pmap->regs + reg_off);
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return !!(input & BIT(bit_off));
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}
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static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
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{
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struct dc_pinmap *pmap = gpiochip_get_data(chip);
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int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
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int bit_off = gpio % PINS_PER_COLLECTION;
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u8 output;
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unsigned long flags;
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spin_lock_irqsave(&pmap->lock, flags);
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output = readb_relaxed(pmap->regs + reg_off);
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if (value)
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output |= BIT(bit_off);
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else
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output &= ~BIT(bit_off);
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writeb_relaxed(output, pmap->regs + reg_off);
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spin_unlock_irqrestore(&pmap->lock, flags);
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}
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static int dc_gpiochip_add(struct dc_pinmap *pmap, struct device_node *np)
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{
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struct gpio_chip *chip = &pmap->chip;
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int ret;
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chip->label = DRIVER_NAME;
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chip->parent = pmap->dev;
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chip->request = gpiochip_generic_request;
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chip->free = gpiochip_generic_free;
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chip->direction_input = dc_gpio_direction_input;
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chip->direction_output = dc_gpio_direction_output;
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chip->get = dc_gpio_get;
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chip->set = dc_gpio_set;
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chip->base = -1;
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chip->ngpio = PINS_COUNT;
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chip->of_node = np;
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chip->of_gpio_n_cells = 2;
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spin_lock_init(&pmap->lock);
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ret = gpiochip_add_data(chip, pmap);
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if (ret < 0)
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return ret;
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ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
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PINS_COUNT);
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if (ret < 0) {
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gpiochip_remove(chip);
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return ret;
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}
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return 0;
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}
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static int dc_pinctrl_probe(struct platform_device *pdev)
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{
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struct dc_pinmap *pmap;
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struct resource *r;
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struct pinctrl_pin_desc *pins;
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struct pinctrl_desc *pctl_desc;
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char *pin_names;
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int name_len = strlen("GP_xx") + 1;
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int i, j;
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pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
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if (!pmap)
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return -ENOMEM;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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pmap->regs = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(pmap->regs))
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return PTR_ERR(pmap->regs);
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pins = devm_kcalloc(&pdev->dev, PINS_COUNT, sizeof(*pins),
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GFP_KERNEL);
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if (!pins)
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return -ENOMEM;
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pin_names = devm_kcalloc(&pdev->dev, PINS_COUNT, name_len,
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GFP_KERNEL);
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if (!pin_names)
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return -ENOMEM;
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for (i = 0; i < PIN_COLLECTIONS; i++) {
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for (j = 0; j < PINS_PER_COLLECTION; j++) {
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int pin_id = i*PINS_PER_COLLECTION + j;
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char *name = &pin_names[pin_id * name_len];
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snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);
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pins[pin_id].number = pin_id;
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pins[pin_id].name = name;
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pmap->pin_names[pin_id] = name;
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}
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}
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pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
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if (!pctl_desc)
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return -ENOMEM;
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pctl_desc->name = DRIVER_NAME,
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pctl_desc->owner = THIS_MODULE,
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pctl_desc->pctlops = &dc_pinctrl_ops,
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pctl_desc->pmxops = &dc_pmxops,
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pctl_desc->npins = PINS_COUNT;
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pctl_desc->pins = pins;
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pmap->desc = pctl_desc;
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pmap->dev = &pdev->dev;
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pmap->pctl = devm_pinctrl_register(&pdev->dev, pctl_desc, pmap);
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if (IS_ERR(pmap->pctl)) {
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dev_err(&pdev->dev, "pinctrl driver registration failed\n");
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return PTR_ERR(pmap->pctl);
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}
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return dc_gpiochip_add(pmap, pdev->dev.of_node);
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}
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static const struct of_device_id dc_pinctrl_ids[] = {
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{ .compatible = "cnxt,cx92755-pinctrl" },
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{ /* sentinel */ }
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};
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static struct platform_driver dc_pinctrl_driver = {
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = dc_pinctrl_ids,
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.suppress_bind_attrs = true,
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},
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.probe = dc_pinctrl_probe,
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};
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builtin_platform_driver(dc_pinctrl_driver);
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