![Tejun Heo](/assets/img/avatar_default.png)
libata lets low level drivers build scsi_host_template and register it to the SCSI layer. This allows low level drivers high level of flexibility but also burdens them with lots of boilerplate entries. This patch implements SHT initializers which can be used to initialize all the boilerplate entries in a sht. Three variants of them are implemented - BASE, BMDMA and NCQ - for different types of drivers. Note that entries can be overriden by putting individual initializers after the helper macro. All sht tables are identical before and after this patch. Signed-off-by: Tejun Heo <htejun@gmail.com>
207 lines
5.1 KiB
C
207 lines
5.1 KiB
C
/*
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* pata_cypress.c - Cypress PATA for new ATA layer
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* (C) 2006 Red Hat Inc
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* Alan Cox <alan@redhat.com>
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*
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* Based heavily on
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* linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "pata_cypress"
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#define DRV_VERSION "0.1.5"
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/* here are the offset definitions for the registers */
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enum {
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CY82_IDE_CMDREG = 0x04,
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CY82_IDE_ADDRSETUP = 0x48,
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CY82_IDE_MASTER_IOR = 0x4C,
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CY82_IDE_MASTER_IOW = 0x4D,
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CY82_IDE_SLAVE_IOR = 0x4E,
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CY82_IDE_SLAVE_IOW = 0x4F,
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CY82_IDE_MASTER_8BIT = 0x50,
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CY82_IDE_SLAVE_8BIT = 0x51,
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CY82_INDEX_PORT = 0x22,
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CY82_DATA_PORT = 0x23,
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CY82_INDEX_CTRLREG1 = 0x01,
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CY82_INDEX_CHANNEL0 = 0x30,
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CY82_INDEX_CHANNEL1 = 0x31,
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CY82_INDEX_TIMEOUT = 0x32
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};
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/**
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* cy82c693_set_piomode - set initial PIO mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Called to do the PIO mode setup.
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*/
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static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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struct ata_timing t;
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const unsigned long T = 1000000 / 33;
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short time_16, time_8;
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u32 addr;
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if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
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printk(KERN_ERR DRV_NAME ": mome computation failed.\n");
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return;
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}
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time_16 = FIT(t.recover, 0, 15) | (FIT(t.active, 0, 15) << 4);
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time_8 = FIT(t.act8b, 0, 15) | (FIT(t.rec8b, 0, 15) << 4);
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if (adev->devno == 0) {
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pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
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addr &= ~0x0F; /* Mask bits */
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addr |= FIT(t.setup, 0, 15);
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pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
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pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
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pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
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pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
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} else {
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pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
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addr &= ~0xF0; /* Mask bits */
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addr |= (FIT(t.setup, 0, 15) << 4);
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pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
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pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
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pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
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pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
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}
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}
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/**
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* cy82c693_set_dmamode - set initial DMA mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Called to do the DMA mode setup.
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*/
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static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
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/* Be afraid, be very afraid. Magic registers in low I/O space */
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outb(reg, 0x22);
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outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
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/* 0x50 gives the best behaviour on the Alpha's using this chip */
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outb(CY82_INDEX_TIMEOUT, 0x22);
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outb(0x50, 0x23);
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}
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static struct scsi_host_template cy82c693_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations cy82c693_port_ops = {
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.set_piomode = cy82c693_set_piomode,
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.set_dmamode = cy82c693_set_dmamode,
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.mode_filter = ata_pci_default_filter,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.cable_detect = ata_cable_40wire,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.data_xfer = ata_data_xfer,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.irq_on = ata_irq_on,
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.port_start = ata_sff_port_start,
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};
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static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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static const struct ata_port_info info = {
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.sht = &cy82c693_sht,
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f,
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.mwdma_mask = 0x07,
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.port_ops = &cy82c693_port_ops
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};
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const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
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/* Devfn 1 is the ATA primary. The secondary is magic and on devfn2.
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For the moment we don't handle the secondary. FIXME */
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if (PCI_FUNC(pdev->devfn) != 1)
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return -ENODEV;
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return ata_pci_init_one(pdev, ppi);
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}
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static const struct pci_device_id cy82c693[] = {
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{ PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), },
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{ },
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};
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static struct pci_driver cy82c693_pci_driver = {
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.name = DRV_NAME,
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.id_table = cy82c693,
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.probe = cy82c693_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static int __init cy82c693_init(void)
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{
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return pci_register_driver(&cy82c693_pci_driver);
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}
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static void __exit cy82c693_exit(void)
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{
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pci_unregister_driver(&cy82c693_pci_driver);
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}
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, cy82c693);
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MODULE_VERSION(DRV_VERSION);
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module_init(cy82c693_init);
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module_exit(cy82c693_exit);
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