![David S. Miller](/assets/img/avatar_default.png)
Meelis Roos reported that kernels built with gcc-4.9 do not boot, we eventually narrowed this down to only impacting machines using UltraSPARC-III and derivitive cpus. The crash happens right when the first user process is spawned: [ 54.451346] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004 [ 54.451346] [ 54.571516] CPU: 1 PID: 1 Comm: init Not tainted 3.16.0-rc2-00211-gd7933ab #96 [ 54.666431] Call Trace: [ 54.698453] [0000000000762f8c] panic+0xb0/0x224 [ 54.759071] [000000000045cf68] do_exit+0x948/0x960 [ 54.823123] [000000000042cbc0] fault_in_user_windows+0xe0/0x100 [ 54.902036] [0000000000404ad0] __handle_user_windows+0x0/0x10 [ 54.978662] Press Stop-A (L1-A) to return to the boot prom [ 55.050713] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004 Further investigation showed that compiling only per_cpu_patch() with an older compiler fixes the boot. Detailed analysis showed that the function is not being miscompiled by gcc-4.9, but it is using a different register allocation ordering. With the gcc-4.9 compiled function, something during the code patching causes some of the %i* input registers to get corrupted. Perhaps we have a TLB miss path into the firmware that is deep enough to cause a register window spill and subsequent restore when we get back from the TLB miss trap. Let's plug this up by doing two things: 1) Stop using the firmware stack for client interface calls into the firmware. Just use the kernel's stack. 2) As soon as we can, call into a new function "start_early_boot()" to put a one-register-window buffer between the firmware's deepest stack frame and the top-most initial kernel one. Reported-by: Meelis Roos <mroos@linux.ee> Tested-by: Meelis Roos <mroos@linux.ee> Signed-off-by: David S. Miller <davem@davemloft.net>
48 lines
947 B
ArmAsm
48 lines
947 B
ArmAsm
/* cif.S: PROM entry/exit assembler trampolines.
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*
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* Copyright (C) 1996, 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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* Copyright (C) 2005, 2006 David S. Miller <davem@davemloft.net>
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*/
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#include <asm/pstate.h>
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#include <asm/cpudata.h>
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#include <asm/thread_info.h>
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.text
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.globl prom_cif_direct
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prom_cif_direct:
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save %sp, -192, %sp
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sethi %hi(p1275buf), %o1
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or %o1, %lo(p1275buf), %o1
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ldx [%o1 + 0x0008], %l2 ! prom_cif_handler
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mov %g4, %l0
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mov %g5, %l1
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mov %g6, %l3
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call %l2
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mov %i0, %o0 ! prom_args
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mov %l0, %g4
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mov %l1, %g5
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mov %l3, %g6
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ret
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restore
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.globl prom_cif_callback
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prom_cif_callback:
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sethi %hi(p1275buf), %o1
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or %o1, %lo(p1275buf), %o1
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save %sp, -192, %sp
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TRAP_LOAD_THREAD_REG(%g6, %g1)
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LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %o0)
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ldx [%g6 + TI_TASK], %g4
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call prom_world
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mov 0, %o0
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ldx [%i1 + 0x000], %l2
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call %l2
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mov %i0, %o0
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mov %o0, %l1
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call prom_world
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mov 1, %o0
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ret
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restore %l1, 0, %o0
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