![Keith Busch](/assets/img/avatar_default.png)
Add a new state to pci_dev to be set when it is unexpectedly disconnected. The PCI driver tear down functions can observe this new device state so they may skip operations that will fail. The pciehp and pcie-dpc drivers are aware when the link is down, so these set the flag when their handlers detect the device is disconnected. Tested-by: Krishna Dhulipala <krishnad@fb.com> Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Wei Zhang <wzhang@fb.com>
182 lines
5.1 KiB
C
182 lines
5.1 KiB
C
/*
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* PCI Express Downstream Port Containment services driver
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* Author: Keith Busch <keith.busch@intel.com>
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*
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* Copyright (C) 2016 Intel Corp.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/pcieport_if.h>
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#include "../pci.h"
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struct dpc_dev {
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struct pcie_device *dev;
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struct work_struct work;
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int cap_pos;
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bool rp;
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};
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static int dpc_wait_rp_inactive(struct dpc_dev *dpc)
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{
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unsigned long timeout = jiffies + HZ;
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struct pci_dev *pdev = dpc->dev->port;
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u16 status;
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pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
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while (status & PCI_EXP_DPC_RP_BUSY &&
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!time_after(jiffies, timeout)) {
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msleep(10);
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pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
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}
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if (status & PCI_EXP_DPC_RP_BUSY) {
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dev_warn(&pdev->dev, "DPC root port still busy\n");
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return -EBUSY;
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}
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return 0;
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}
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static void dpc_wait_link_inactive(struct pci_dev *pdev)
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{
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unsigned long timeout = jiffies + HZ;
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u16 lnk_status;
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pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
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while (lnk_status & PCI_EXP_LNKSTA_DLLLA &&
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!time_after(jiffies, timeout)) {
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msleep(10);
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pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
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}
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if (lnk_status & PCI_EXP_LNKSTA_DLLLA)
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dev_warn(&pdev->dev, "Link state not disabled for DPC event\n");
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}
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static void interrupt_event_handler(struct work_struct *work)
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{
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struct dpc_dev *dpc = container_of(work, struct dpc_dev, work);
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struct pci_dev *dev, *temp, *pdev = dpc->dev->port;
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struct pci_bus *parent = pdev->subordinate;
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pci_lock_rescan_remove();
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list_for_each_entry_safe_reverse(dev, temp, &parent->devices,
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bus_list) {
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pci_dev_get(dev);
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pci_dev_set_disconnected(dev, NULL);
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if (pci_has_subordinate(dev))
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pci_walk_bus(dev->subordinate,
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pci_dev_set_disconnected, NULL);
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pci_stop_and_remove_bus_device(dev);
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pci_dev_put(dev);
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}
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pci_unlock_rescan_remove();
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dpc_wait_link_inactive(pdev);
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if (dpc->rp && dpc_wait_rp_inactive(dpc))
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return;
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pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS,
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PCI_EXP_DPC_STATUS_TRIGGER | PCI_EXP_DPC_STATUS_INTERRUPT);
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}
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static irqreturn_t dpc_irq(int irq, void *context)
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{
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struct dpc_dev *dpc = (struct dpc_dev *)context;
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struct pci_dev *pdev = dpc->dev->port;
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u16 status, source;
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pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
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pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_SOURCE_ID,
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&source);
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if (!status)
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return IRQ_NONE;
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dev_info(&dpc->dev->device, "DPC containment event, status:%#06x source:%#06x\n",
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status, source);
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if (status & PCI_EXP_DPC_STATUS_TRIGGER) {
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u16 reason = (status >> 1) & 0x3;
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u16 ext_reason = (status >> 5) & 0x3;
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dev_warn(&dpc->dev->device, "DPC %s detected, remove downstream devices\n",
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(reason == 0) ? "unmasked uncorrectable error" :
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(reason == 1) ? "ERR_NONFATAL" :
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(reason == 2) ? "ERR_FATAL" :
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(ext_reason == 0) ? "RP PIO error" :
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(ext_reason == 1) ? "software trigger" :
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"reserved error");
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schedule_work(&dpc->work);
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}
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return IRQ_HANDLED;
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}
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#define FLAG(x, y) (((x) & (y)) ? '+' : '-')
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static int dpc_probe(struct pcie_device *dev)
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{
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struct dpc_dev *dpc;
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struct pci_dev *pdev = dev->port;
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int status;
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u16 ctl, cap;
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dpc = devm_kzalloc(&dev->device, sizeof(*dpc), GFP_KERNEL);
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if (!dpc)
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return -ENOMEM;
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dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
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dpc->dev = dev;
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INIT_WORK(&dpc->work, interrupt_event_handler);
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set_service_data(dev, dpc);
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status = devm_request_irq(&dev->device, dev->irq, dpc_irq, IRQF_SHARED,
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"pcie-dpc", dpc);
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if (status) {
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dev_warn(&dev->device, "request IRQ%d failed: %d\n", dev->irq,
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status);
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return status;
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}
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pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);
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pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
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dpc->rp = (cap & PCI_EXP_DPC_CAP_RP_EXT);
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ctl |= PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN;
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pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
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dev_info(&dev->device, "DPC error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n",
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cap & 0xf, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),
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FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),
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FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), (cap >> 8) & 0xf,
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FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE));
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return status;
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}
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static void dpc_remove(struct pcie_device *dev)
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{
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struct dpc_dev *dpc = get_service_data(dev);
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struct pci_dev *pdev = dev->port;
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u16 ctl;
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pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
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ctl &= ~(PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN);
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pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
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}
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static struct pcie_port_service_driver dpcdriver = {
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.name = "dpc",
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.port_type = PCIE_ANY_PORT,
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.service = PCIE_PORT_SERVICE_DPC,
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.probe = dpc_probe,
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.remove = dpc_remove,
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};
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static int __init dpc_service_init(void)
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{
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return pcie_port_service_register(&dpcdriver);
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}
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device_initcall(dpc_service_init);
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