Peter De Schrijver 8e9cc80aa3 clk: tegra: use pll_ref as the pll_e parent ... Use pll_ref instead of pll_re_vco as the pll_e parent on Tegra114. Also add a 12Mhz pll_ref table entry for pll_e for Tegra114. This prevents the system from crashing at bootup because of an unsupported pll_re_vco rate. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>		2013-11-26 18:46:21 +02:00
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clk-audio-sync.c	clk: tegra: add Tegra specific clocks	2013-01-28 11:19:07 -07:00
clk-divider.c	clk: tegra: add Tegra specific clocks	2013-01-28 11:19:07 -07:00
clk-periph-gate.c	clk: tegra: simplify periph clock data	2013-11-26 18:45:40 +02:00
clk-periph.c	clk: tegra: Add TEGRA_PERIPH_NO_DIV flag	2013-11-26 18:46:20 +02:00
clk-pll-out.c	clk: tegra: add Tegra specific clocks	2013-01-28 11:19:07 -07:00
clk-pll.c	clk: tegra: use pll_ref as the pll_e parent	2013-11-26 18:46:21 +02:00
clk-super.c	clk: tegra: Implement locking for super clock	2013-02-12 10:29:12 -07:00
clk-tegra20.c	clk: tegra: common periph_clk_enb_refcnt and clks	2013-11-26 18:46:18 +02:00
clk-tegra30.c	clk: tegra: common periph_clk_enb_refcnt and clks	2013-11-26 18:46:18 +02:00
clk-tegra114.c	clk: tegra: use pll_ref as the pll_e parent	2013-11-26 18:46:21 +02:00
clk.c	clk: tegra: common periph_clk_enb_refcnt and clks	2013-11-26 18:46:18 +02:00
clk.h	clk: tegra: Add TEGRA_PERIPH_NO_DIV flag	2013-11-26 18:46:20 +02:00
Makefile	clk: tegra: Implement clocks for Tegra114	2013-04-04 17:17:12 -06:00