684f741446
The module is a bridge between the RTC clock domain and the CPU interface clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through this module. Signed-off-by: Zhiwu Song <zhiwu.song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
19 lines
472 B
C
19 lines
472 B
C
/*
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* RTC I/O Bridge interfaces for CSR SiRFprimaII
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* ARM access the registers of SYSRTC, GPSRTC and PWRC through this module
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*
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* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
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*
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* Licensed under GPLv2 or later.
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*/
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#ifndef _SIRFSOC_RTC_IOBRG_H_
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#define _SIRFSOC_RTC_IOBRG_H_
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extern void sirfsoc_rtc_iobrg_besyncing(void);
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extern u32 sirfsoc_rtc_iobrg_readl(u32 addr);
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extern void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr);
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#endif
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