44 lines
1.5 KiB
Plaintext
44 lines
1.5 KiB
Plaintext
Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
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Required properties:
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- compatible : Should be "fsl,<processor>-flexcan"
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An implementation should also claim any of the following compatibles
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that it is fully backwards compatible with:
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- fsl,p1010-flexcan
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- reg : Offset and length of the register set for this device
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- interrupts : Interrupt tuple for this device
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Optional properties:
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- clock-frequency : The oscillator frequency driving the flexcan device
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- xceiver-supply: Regulator that powers the CAN transceiver
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- stop-mode: register bits of stop mode control, the format is
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<&gpr req_gpr req_bit ack_gpr ack_bit>.
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gpr is the phandle to general purpose register node.
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req_gpr is the gpr register offset of CAN stop request.
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req_bit is the bit offset of CAN stop request.
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ack_gpr is the gpr register offset of CAN stop acknowledge.
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ack_bit is the bit offset of CAN stop acknowledge.
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- trx_en_gpio : enable gpio
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- trx_stby_gpio : standby gpio
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- trx_nerr_gpio : NERR gpio
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- disable-fd-mode : disable CAN FD mode support. Valid since i.MX8 series.
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- clk-src : Selects the clock source to the CAN Protocol Engine (PE). It's SoC
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Implementation dependent. Refer to RM for detailed definition.
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0: clock source 0 1: clock source 1
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Example:
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can@1c000 {
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compatible = "fsl,p1010-flexcan";
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reg = <0x1c000 0x1000>;
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interrupts = <48 0x2>;
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interrupt-parent = <&mpic>;
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clock-frequency = <200000000>; // filled in by bootloader
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};
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