![Akira Takeuchi](/assets/img/avatar_default.png)
Make controllable the use of the PIDR register to mark TLB entries as belonging to particular processes. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
63 lines
1.6 KiB
C
63 lines
1.6 KiB
C
/* MN10300 MMU context allocation and management
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <asm/mmu_context.h>
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#include <asm/tlbflush.h>
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#ifdef CONFIG_MN10300_TLB_USE_PIDR
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/*
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* list of the MMU contexts last allocated on each CPU
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*/
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unsigned long mmu_context_cache[NR_CPUS] = {
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[0 ... NR_CPUS - 1] =
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MMU_CONTEXT_FIRST_VERSION * 2 - (1 - MMU_CONTEXT_TLBPID_LOCK_NR),
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};
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#endif /* CONFIG_MN10300_TLB_USE_PIDR */
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/*
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* preemptively set a TLB entry
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*/
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void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
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{
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unsigned long pteu, ptel, cnx, flags;
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pte_t pte = *ptep;
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addr &= PAGE_MASK;
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ptel = pte_val(pte) & ~(xPTEL_UNUSED1 | xPTEL_UNUSED2);
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/* make sure the context doesn't migrate and defend against
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* interference from vmalloc'd regions */
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local_irq_save(flags);
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cnx = ~MMU_NO_CONTEXT;
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#ifdef CONFIG_MN10300_TLB_USE_PIDR
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cnx = mm_context(vma->vm_mm);
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#endif
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if (cnx != MMU_NO_CONTEXT) {
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pteu = addr;
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#ifdef CONFIG_MN10300_TLB_USE_PIDR
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pteu |= cnx & MMU_CONTEXT_TLBPID_MASK;
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#endif
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if (!(pte_val(pte) & _PAGE_NX)) {
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IPTEU = pteu;
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if (IPTEL & xPTEL_V)
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IPTEL = ptel;
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}
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DPTEU = pteu;
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if (DPTEL & xPTEL_V)
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DPTEL = ptel;
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}
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local_irq_restore(flags);
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}
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