Jim Lin 9d61707b1f clk: tegra: Fix xusb_fs_src mux ... The parent-to-index mapping for xusb_fs_src is incorrect. Fix it by adding a mux table. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2014-05-22 22:14:52 -07:00
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clk-audio-sync.c	clk: tegra: add Tegra specific clocks	2013-01-28 11:19:07 -07:00
clk-divider.c	clk: tegra: use max divider if divider overflows	2014-02-17 16:18:34 +02:00
clk-id.h	clk: tegra: fix sdmmc clks on Tegra1x4	2014-02-17 16:18:23 +02:00
clk-periph-gate.c	clk: tegra: remove legacy reset APIs	2013-12-11 16:45:07 -07:00
clk-periph.c	clk: tegra: Staticize tegra_clk_periph_no_gate_ops	2014-02-23 14:46:05 -08:00
clk-pll-out.c	clk: tegra: add Tegra specific clocks	2013-01-28 11:19:07 -07:00
clk-pll.c	clk: tegra: Enable hardware control of PLLE	2014-05-22 22:14:51 -07:00
clk-super.c	clk: tegra: Implement locking for super clock	2013-02-12 10:29:12 -07:00
clk-tegra-audio.c	clk: tegra: move audio clk to common file	2013-11-26 18:46:24 +02:00
clk-tegra-fixed.c	clk: tegra: move PMC, fixed clocks to common files	2013-11-26 18:46:49 +02:00
clk-tegra-periph.c	clk: tegra: Fix xusb_fs_src mux	2014-05-22 22:14:52 -07:00
clk-tegra-pmc.c	clk: tegra: move PMC, fixed clocks to common files	2013-11-26 18:46:49 +02:00
clk-tegra-super-gen4.c	clk: tegra: cclk_lp has a pllx/2 divider	2014-02-17 16:18:28 +02:00
clk-tegra20.c	clk: tegra: Add missing Tegra20 fuse clks	2014-02-17 16:13:25 +02:00
clk-tegra30.c	clk: tegra: remove bogus PCIE_XCLK	2013-12-11 16:45:13 -07:00
clk-tegra114.c	clk: tegra: fix sdmmc clks on Tegra1x4	2014-02-17 16:18:23 +02:00
clk-tegra124.c	clk: tegra: remove non-existent clocks	2014-04-24 15:36:50 +02:00
clk.c	clk: tegra: implement a reset driver	2013-12-11 16:42:48 -07:00
clk.h	clk: tegra: remove legacy reset APIs	2013-12-11 16:45:07 -07:00
Makefile	clk: tegra124: Add support for Tegra124 clocks	2013-11-26 18:46:54 +02:00