5a79859ae0
Remove the 31 bit support in order to reduce maintenance cost and
effectively remove dead code. Since a couple of years there is no
distribution left that comes with a 31 bit kernel.
The 31 bit kernel also has been broken since more than a year before
anybody noticed. In addition I added a removal warning to the kernel
shown at ipl for 5 minutes: a960062e58 ("s390: add 31 bit warning
message") which let everybody know about the plan to remove 31 bit
code. We didn't get any response.
Given that the last 31 bit only machine was introduced in 1999 let's
remove the code.
Anybody with 31 bit user space code can still use the compat mode.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
178 lines
4.9 KiB
C
178 lines
4.9 KiB
C
/*
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* S390 version
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* Copyright IBM Corp. 1999, 2000
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* Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
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*/
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#ifndef _S390_PTRACE_H
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#define _S390_PTRACE_H
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#include <uapi/asm/ptrace.h>
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#define PIF_SYSCALL 0 /* inside a system call */
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#define PIF_PER_TRAP 1 /* deliver sigtrap on return to user */
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#define _PIF_SYSCALL (1<<PIF_SYSCALL)
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#define _PIF_PER_TRAP (1<<PIF_PER_TRAP)
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#ifndef __ASSEMBLY__
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#define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
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PSW_MASK_EA | PSW_MASK_BA)
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#define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
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PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
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PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
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struct psw_bits {
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unsigned long long : 1;
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unsigned long long r : 1; /* PER-Mask */
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unsigned long long : 3;
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unsigned long long t : 1; /* DAT Mode */
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unsigned long long i : 1; /* Input/Output Mask */
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unsigned long long e : 1; /* External Mask */
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unsigned long long key : 4; /* PSW Key */
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unsigned long long : 1;
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unsigned long long m : 1; /* Machine-Check Mask */
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unsigned long long w : 1; /* Wait State */
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unsigned long long p : 1; /* Problem State */
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unsigned long long as : 2; /* Address Space Control */
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unsigned long long cc : 2; /* Condition Code */
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unsigned long long pm : 4; /* Program Mask */
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unsigned long long ri : 1; /* Runtime Instrumentation */
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unsigned long long : 6;
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unsigned long long eaba : 2; /* Addressing Mode */
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unsigned long long : 31;
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unsigned long long ia : 64;/* Instruction Address */
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};
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enum {
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PSW_AMODE_24BIT = 0,
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PSW_AMODE_31BIT = 1,
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PSW_AMODE_64BIT = 3
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};
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enum {
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PSW_AS_PRIMARY = 0,
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PSW_AS_ACCREG = 1,
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PSW_AS_SECONDARY = 2,
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PSW_AS_HOME = 3
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};
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#define psw_bits(__psw) (*({ \
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typecheck(psw_t, __psw); \
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&(*(struct psw_bits *)(&(__psw))); \
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}))
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/*
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* The pt_regs struct defines the way the registers are stored on
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* the stack during a system call.
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*/
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struct pt_regs
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{
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unsigned long args[1];
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psw_t psw;
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unsigned long gprs[NUM_GPRS];
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unsigned long orig_gpr2;
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unsigned int int_code;
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unsigned int int_parm;
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unsigned long int_parm_long;
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unsigned long flags;
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};
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/*
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* Program event recording (PER) register set.
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*/
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struct per_regs {
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unsigned long control; /* PER control bits */
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unsigned long start; /* PER starting address */
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unsigned long end; /* PER ending address */
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};
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/*
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* PER event contains information about the cause of the last PER exception.
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*/
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struct per_event {
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unsigned short cause; /* PER code, ATMID and AI */
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unsigned long address; /* PER address */
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unsigned char paid; /* PER access identification */
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};
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/*
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* Simplified per_info structure used to decode the ptrace user space ABI.
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*/
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struct per_struct_kernel {
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unsigned long cr9; /* PER control bits */
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unsigned long cr10; /* PER starting address */
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unsigned long cr11; /* PER ending address */
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unsigned long bits; /* Obsolete software bits */
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unsigned long starting_addr; /* User specified start address */
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unsigned long ending_addr; /* User specified end address */
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unsigned short perc_atmid; /* PER trap ATMID */
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unsigned long address; /* PER trap instruction address */
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unsigned char access_id; /* PER trap access identification */
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};
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#define PER_EVENT_MASK 0xEB000000UL
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#define PER_EVENT_BRANCH 0x80000000UL
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#define PER_EVENT_IFETCH 0x40000000UL
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#define PER_EVENT_STORE 0x20000000UL
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#define PER_EVENT_STORE_REAL 0x08000000UL
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#define PER_EVENT_TRANSACTION_END 0x02000000UL
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#define PER_EVENT_NULLIFICATION 0x01000000UL
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#define PER_CONTROL_MASK 0x00e00000UL
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#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
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#define PER_CONTROL_SUSPENSION 0x00400000UL
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#define PER_CONTROL_ALTERATION 0x00200000UL
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static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
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{
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regs->flags |= (1U << flag);
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}
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static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
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{
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regs->flags &= ~(1U << flag);
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}
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static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
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{
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return !!(regs->flags & (1U << flag));
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}
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/*
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* These are defined as per linux/ptrace.h, which see.
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*/
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#define arch_has_single_step() (1)
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#define arch_has_block_step() (1)
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#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
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#define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
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#define user_stack_pointer(regs)((regs)->gprs[15])
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#define profile_pc(regs) instruction_pointer(regs)
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static inline long regs_return_value(struct pt_regs *regs)
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{
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return regs->gprs[2];
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}
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static inline void instruction_pointer_set(struct pt_regs *regs,
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unsigned long val)
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{
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regs->psw.addr = val | PSW_ADDR_AMODE;
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}
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int regs_query_register_offset(const char *name);
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const char *regs_query_register_name(unsigned int offset);
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unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
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unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
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static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
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{
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return regs->gprs[15] & PSW_ADDR_INSN;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* _S390_PTRACE_H */
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