![Takashi Iwai](/assets/img/avatar_default.png)
The commit [dcda58061
: ALSA: hda - Add workaround for conflicting
IEC958 controls] introduced a workaround for cards that have both
SPDIF and HDMI devices for giving device=1 to SPDIF control elements.
It turned out, however, that this workaround doesn't work well -
- The workaround checks only conflicts in a single codec, but SPDIF
and HDMI are provided by multiple codecs in many cases, and
- ALSA mixer abstraction doesn't care about the device number in ctl
elements, thus you'll get errors from amixer such as
% amixer scontrols -c 0
ALSA lib simple_none.c:1551:(simple_add1) helem (MIXER,'IEC958
Playback Switch',0,1,0) appears twice or more
amixer: Mixer hw:0 load error: Invalid argument
This patch fixes the previous broken workaround. Instead of changing
the device number of SPDIF ctl elements, shift the element indices of
such controls up to 16. Also, the conflict check is performed over
all codecs found on the bus.
HDMI devices will be put to dev=0,index=0 as before. Only the
conflicting SPDIF device is moved to a different place. The new place
of SPDIF device is supposed by the updated alsa-lib HDA-Intel.conf,
respectively.
Reported-by: Stephan Raue <stephan@openelec.tv>
Reported-by: Anssi Hannula <anssi.hannula@iki.fi>
Cc: <stable@vger.kernel.org> [v3.8]
Signed-off-by: Takashi Iwai <tiwai@suse.de>
1214 lines
36 KiB
C
1214 lines
36 KiB
C
/*
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* Universal Interface for Intel High Definition Audio Codec
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*
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* Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef __SOUND_HDA_CODEC_H
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#define __SOUND_HDA_CODEC_H
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#include <sound/info.h>
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#include <sound/control.h>
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#include <sound/pcm.h>
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#include <sound/hwdep.h>
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/*
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* nodes
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*/
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#define AC_NODE_ROOT 0x00
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/*
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* function group types
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*/
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enum {
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AC_GRP_AUDIO_FUNCTION = 0x01,
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AC_GRP_MODEM_FUNCTION = 0x02,
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};
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/*
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* widget types
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*/
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enum {
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AC_WID_AUD_OUT, /* Audio Out */
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AC_WID_AUD_IN, /* Audio In */
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AC_WID_AUD_MIX, /* Audio Mixer */
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AC_WID_AUD_SEL, /* Audio Selector */
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AC_WID_PIN, /* Pin Complex */
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AC_WID_POWER, /* Power */
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AC_WID_VOL_KNB, /* Volume Knob */
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AC_WID_BEEP, /* Beep Generator */
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AC_WID_VENDOR = 0x0f /* Vendor specific */
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};
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/*
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* GET verbs
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*/
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#define AC_VERB_GET_STREAM_FORMAT 0x0a00
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#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
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#define AC_VERB_GET_PROC_COEF 0x0c00
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#define AC_VERB_GET_COEF_INDEX 0x0d00
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#define AC_VERB_PARAMETERS 0x0f00
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#define AC_VERB_GET_CONNECT_SEL 0x0f01
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#define AC_VERB_GET_CONNECT_LIST 0x0f02
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#define AC_VERB_GET_PROC_STATE 0x0f03
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#define AC_VERB_GET_SDI_SELECT 0x0f04
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#define AC_VERB_GET_POWER_STATE 0x0f05
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#define AC_VERB_GET_CONV 0x0f06
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#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
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#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
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#define AC_VERB_GET_PIN_SENSE 0x0f09
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#define AC_VERB_GET_BEEP_CONTROL 0x0f0a
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#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
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#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
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#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
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#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
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/* f10-f1a: GPIO */
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#define AC_VERB_GET_GPIO_DATA 0x0f15
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#define AC_VERB_GET_GPIO_MASK 0x0f16
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#define AC_VERB_GET_GPIO_DIRECTION 0x0f17
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#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
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#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
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#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
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#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
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/* f20: AFG/MFG */
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#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
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#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
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#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
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#define AC_VERB_GET_HDMI_ELDD 0x0f2f
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#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
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#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
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#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
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#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
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#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
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/*
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* SET verbs
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*/
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#define AC_VERB_SET_STREAM_FORMAT 0x200
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#define AC_VERB_SET_AMP_GAIN_MUTE 0x300
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#define AC_VERB_SET_PROC_COEF 0x400
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#define AC_VERB_SET_COEF_INDEX 0x500
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#define AC_VERB_SET_CONNECT_SEL 0x701
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#define AC_VERB_SET_PROC_STATE 0x703
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#define AC_VERB_SET_SDI_SELECT 0x704
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#define AC_VERB_SET_POWER_STATE 0x705
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#define AC_VERB_SET_CHANNEL_STREAMID 0x706
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#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
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#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
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#define AC_VERB_SET_PIN_SENSE 0x709
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#define AC_VERB_SET_BEEP_CONTROL 0x70a
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#define AC_VERB_SET_EAPD_BTLENABLE 0x70c
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#define AC_VERB_SET_DIGI_CONVERT_1 0x70d
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#define AC_VERB_SET_DIGI_CONVERT_2 0x70e
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#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
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#define AC_VERB_SET_GPIO_DATA 0x715
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#define AC_VERB_SET_GPIO_MASK 0x716
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#define AC_VERB_SET_GPIO_DIRECTION 0x717
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#define AC_VERB_SET_GPIO_WAKE_MASK 0x718
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#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
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#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
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#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
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#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
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#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
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#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
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#define AC_VERB_SET_EAPD 0x788
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#define AC_VERB_SET_CODEC_RESET 0x7ff
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#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
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#define AC_VERB_SET_HDMI_DIP_INDEX 0x730
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#define AC_VERB_SET_HDMI_DIP_DATA 0x731
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#define AC_VERB_SET_HDMI_DIP_XMIT 0x732
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#define AC_VERB_SET_HDMI_CP_CTRL 0x733
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#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
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/*
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* Parameter IDs
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*/
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#define AC_PAR_VENDOR_ID 0x00
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#define AC_PAR_SUBSYSTEM_ID 0x01
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#define AC_PAR_REV_ID 0x02
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#define AC_PAR_NODE_COUNT 0x04
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#define AC_PAR_FUNCTION_TYPE 0x05
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#define AC_PAR_AUDIO_FG_CAP 0x08
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#define AC_PAR_AUDIO_WIDGET_CAP 0x09
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#define AC_PAR_PCM 0x0a
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#define AC_PAR_STREAM 0x0b
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#define AC_PAR_PIN_CAP 0x0c
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#define AC_PAR_AMP_IN_CAP 0x0d
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#define AC_PAR_CONNLIST_LEN 0x0e
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#define AC_PAR_POWER_STATE 0x0f
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#define AC_PAR_PROC_CAP 0x10
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#define AC_PAR_GPIO_CAP 0x11
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#define AC_PAR_AMP_OUT_CAP 0x12
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#define AC_PAR_VOL_KNB_CAP 0x13
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#define AC_PAR_HDMI_LPCM_CAP 0x20
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/*
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* AC_VERB_PARAMETERS results (32bit)
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*/
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/* Function Group Type */
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#define AC_FGT_TYPE (0xff<<0)
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#define AC_FGT_TYPE_SHIFT 0
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#define AC_FGT_UNSOL_CAP (1<<8)
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/* Audio Function Group Capabilities */
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#define AC_AFG_OUT_DELAY (0xf<<0)
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#define AC_AFG_IN_DELAY (0xf<<8)
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#define AC_AFG_BEEP_GEN (1<<16)
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/* Audio Widget Capabilities */
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#define AC_WCAP_STEREO (1<<0) /* stereo I/O */
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#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
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#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
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#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
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#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
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#define AC_WCAP_STRIPE (1<<5) /* stripe */
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#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
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#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
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#define AC_WCAP_CONN_LIST (1<<8) /* connection list */
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#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
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#define AC_WCAP_POWER (1<<10) /* power control */
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#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
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#define AC_WCAP_CP_CAPS (1<<12) /* content protection */
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#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
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#define AC_WCAP_DELAY (0xf<<16)
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#define AC_WCAP_DELAY_SHIFT 16
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#define AC_WCAP_TYPE (0xf<<20)
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#define AC_WCAP_TYPE_SHIFT 20
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/* supported PCM rates and bits */
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#define AC_SUPPCM_RATES (0xfff << 0)
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#define AC_SUPPCM_BITS_8 (1<<16)
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#define AC_SUPPCM_BITS_16 (1<<17)
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#define AC_SUPPCM_BITS_20 (1<<18)
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#define AC_SUPPCM_BITS_24 (1<<19)
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#define AC_SUPPCM_BITS_32 (1<<20)
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/* supported PCM stream format */
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#define AC_SUPFMT_PCM (1<<0)
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#define AC_SUPFMT_FLOAT32 (1<<1)
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#define AC_SUPFMT_AC3 (1<<2)
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/* GP I/O count */
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#define AC_GPIO_IO_COUNT (0xff<<0)
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#define AC_GPIO_O_COUNT (0xff<<8)
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#define AC_GPIO_O_COUNT_SHIFT 8
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#define AC_GPIO_I_COUNT (0xff<<16)
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#define AC_GPIO_I_COUNT_SHIFT 16
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#define AC_GPIO_UNSOLICITED (1<<30)
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#define AC_GPIO_WAKE (1<<31)
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/* Converter stream, channel */
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#define AC_CONV_CHANNEL (0xf<<0)
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#define AC_CONV_STREAM (0xf<<4)
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#define AC_CONV_STREAM_SHIFT 4
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/* Input converter SDI select */
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#define AC_SDI_SELECT (0xf<<0)
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/* stream format id */
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#define AC_FMT_CHAN_SHIFT 0
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#define AC_FMT_CHAN_MASK (0x0f << 0)
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#define AC_FMT_BITS_SHIFT 4
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#define AC_FMT_BITS_MASK (7 << 4)
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#define AC_FMT_BITS_8 (0 << 4)
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#define AC_FMT_BITS_16 (1 << 4)
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#define AC_FMT_BITS_20 (2 << 4)
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#define AC_FMT_BITS_24 (3 << 4)
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#define AC_FMT_BITS_32 (4 << 4)
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#define AC_FMT_DIV_SHIFT 8
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#define AC_FMT_DIV_MASK (7 << 8)
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#define AC_FMT_MULT_SHIFT 11
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#define AC_FMT_MULT_MASK (7 << 11)
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#define AC_FMT_BASE_SHIFT 14
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#define AC_FMT_BASE_48K (0 << 14)
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#define AC_FMT_BASE_44K (1 << 14)
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#define AC_FMT_TYPE_SHIFT 15
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#define AC_FMT_TYPE_PCM (0 << 15)
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#define AC_FMT_TYPE_NON_PCM (1 << 15)
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/* Unsolicited response control */
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#define AC_UNSOL_TAG (0x3f<<0)
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#define AC_UNSOL_ENABLED (1<<7)
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#define AC_USRSP_EN AC_UNSOL_ENABLED
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/* Unsolicited responses */
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#define AC_UNSOL_RES_TAG (0x3f<<26)
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#define AC_UNSOL_RES_TAG_SHIFT 26
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#define AC_UNSOL_RES_SUBTAG (0x1f<<21)
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#define AC_UNSOL_RES_SUBTAG_SHIFT 21
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#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
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#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
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#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
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#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
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/* Pin widget capabilies */
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#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
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#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
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#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
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#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
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#define AC_PINCAP_OUT (1<<4) /* output capable */
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#define AC_PINCAP_IN (1<<5) /* input capable */
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#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
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/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
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* but is marked reserved in the Intel HDA specification.
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*/
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#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
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/* Note: The same bit as LR_SWAP is newly defined as HDMI capability
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* in HD-audio specification
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*/
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#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
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#define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
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* coexist with AC_PINCAP_HDMI
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*/
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#define AC_PINCAP_VREF (0x37<<8)
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#define AC_PINCAP_VREF_SHIFT 8
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#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
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#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
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/* Vref status (used in pin cap) */
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#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
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#define AC_PINCAP_VREF_50 (1<<1) /* 50% */
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#define AC_PINCAP_VREF_GRD (1<<2) /* ground */
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#define AC_PINCAP_VREF_80 (1<<4) /* 80% */
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#define AC_PINCAP_VREF_100 (1<<5) /* 100% */
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/* Amplifier capabilities */
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#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
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#define AC_AMPCAP_OFFSET_SHIFT 0
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#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
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#define AC_AMPCAP_NUM_STEPS_SHIFT 8
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#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
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* in 0.25dB
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*/
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#define AC_AMPCAP_STEP_SIZE_SHIFT 16
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#define AC_AMPCAP_MUTE (1<<31) /* mute capable */
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#define AC_AMPCAP_MUTE_SHIFT 31
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/* driver-specific amp-caps: using bits 24-30 */
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#define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */
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/* Connection list */
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#define AC_CLIST_LENGTH (0x7f<<0)
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#define AC_CLIST_LONG (1<<7)
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/* Supported power status */
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#define AC_PWRST_D0SUP (1<<0)
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#define AC_PWRST_D1SUP (1<<1)
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#define AC_PWRST_D2SUP (1<<2)
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#define AC_PWRST_D3SUP (1<<3)
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#define AC_PWRST_D3COLDSUP (1<<4)
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#define AC_PWRST_S3D3COLDSUP (1<<29)
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#define AC_PWRST_CLKSTOP (1<<30)
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#define AC_PWRST_EPSS (1U<<31)
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/* Power state values */
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#define AC_PWRST_SETTING (0xf<<0)
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#define AC_PWRST_ACTUAL (0xf<<4)
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#define AC_PWRST_ACTUAL_SHIFT 4
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#define AC_PWRST_D0 0x00
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#define AC_PWRST_D1 0x01
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#define AC_PWRST_D2 0x02
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#define AC_PWRST_D3 0x03
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#define AC_PWRST_ERROR (1<<8)
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#define AC_PWRST_CLK_STOP_OK (1<<9)
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#define AC_PWRST_SETTING_RESET (1<<10)
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/* Processing capabilies */
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#define AC_PCAP_BENIGN (1<<0)
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#define AC_PCAP_NUM_COEF (0xff<<8)
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#define AC_PCAP_NUM_COEF_SHIFT 8
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/* Volume knobs capabilities */
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#define AC_KNBCAP_NUM_STEPS (0x7f<<0)
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#define AC_KNBCAP_DELTA (1<<7)
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/* HDMI LPCM capabilities */
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#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
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#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
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#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
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#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
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#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
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#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
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#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
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#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
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#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
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#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
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#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
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#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
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#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
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#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
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/*
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* Control Parameters
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*/
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/* Amp gain/mute */
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#define AC_AMP_MUTE (1<<7)
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#define AC_AMP_GAIN (0x7f)
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#define AC_AMP_GET_INDEX (0xf<<0)
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#define AC_AMP_GET_LEFT (1<<13)
|
|
#define AC_AMP_GET_RIGHT (0<<13)
|
|
#define AC_AMP_GET_OUTPUT (1<<15)
|
|
#define AC_AMP_GET_INPUT (0<<15)
|
|
|
|
#define AC_AMP_SET_INDEX (0xf<<8)
|
|
#define AC_AMP_SET_INDEX_SHIFT 8
|
|
#define AC_AMP_SET_RIGHT (1<<12)
|
|
#define AC_AMP_SET_LEFT (1<<13)
|
|
#define AC_AMP_SET_INPUT (1<<14)
|
|
#define AC_AMP_SET_OUTPUT (1<<15)
|
|
|
|
/* DIGITAL1 bits */
|
|
#define AC_DIG1_ENABLE (1<<0)
|
|
#define AC_DIG1_V (1<<1)
|
|
#define AC_DIG1_VCFG (1<<2)
|
|
#define AC_DIG1_EMPHASIS (1<<3)
|
|
#define AC_DIG1_COPYRIGHT (1<<4)
|
|
#define AC_DIG1_NONAUDIO (1<<5)
|
|
#define AC_DIG1_PROFESSIONAL (1<<6)
|
|
#define AC_DIG1_LEVEL (1<<7)
|
|
|
|
/* DIGITAL2 bits */
|
|
#define AC_DIG2_CC (0x7f<<0)
|
|
|
|
/* DIGITAL3 bits */
|
|
#define AC_DIG3_ICT (0xf<<0)
|
|
#define AC_DIG3_KAE (1<<7)
|
|
|
|
/* Pin widget control - 8bit */
|
|
#define AC_PINCTL_EPT (0x3<<0)
|
|
#define AC_PINCTL_EPT_NATIVE 0
|
|
#define AC_PINCTL_EPT_HBR 3
|
|
#define AC_PINCTL_VREFEN (0x7<<0)
|
|
#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
|
|
#define AC_PINCTL_VREF_50 1 /* 50% */
|
|
#define AC_PINCTL_VREF_GRD 2 /* ground */
|
|
#define AC_PINCTL_VREF_80 4 /* 80% */
|
|
#define AC_PINCTL_VREF_100 5 /* 100% */
|
|
#define AC_PINCTL_IN_EN (1<<5)
|
|
#define AC_PINCTL_OUT_EN (1<<6)
|
|
#define AC_PINCTL_HP_EN (1<<7)
|
|
|
|
/* Pin sense - 32bit */
|
|
#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
|
|
#define AC_PINSENSE_PRESENCE (1<<31)
|
|
#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
|
|
|
|
/* EAPD/BTL enable - 32bit */
|
|
#define AC_EAPDBTL_BALANCED (1<<0)
|
|
#define AC_EAPDBTL_EAPD (1<<1)
|
|
#define AC_EAPDBTL_LR_SWAP (1<<2)
|
|
|
|
/* HDMI ELD data */
|
|
#define AC_ELDD_ELD_VALID (1<<31)
|
|
#define AC_ELDD_ELD_DATA 0xff
|
|
|
|
/* HDMI DIP size */
|
|
#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
|
|
#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
|
|
|
|
/* HDMI DIP index */
|
|
#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
|
|
#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
|
|
|
|
/* HDMI DIP xmit (transmit) control */
|
|
#define AC_DIPXMIT_MASK (0x3<<6)
|
|
#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
|
|
#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
|
|
#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
|
|
|
|
/* HDMI content protection (CP) control */
|
|
#define AC_CPCTRL_CES (1<<9) /* current encryption state */
|
|
#define AC_CPCTRL_READY (1<<8) /* ready bit */
|
|
#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
|
|
#define AC_CPCTRL_STATE (3<<0) /* current CP request state */
|
|
|
|
/* Converter channel <-> HDMI slot mapping */
|
|
#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
|
|
#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
|
|
|
|
/* configuration default - 32bit */
|
|
#define AC_DEFCFG_SEQUENCE (0xf<<0)
|
|
#define AC_DEFCFG_DEF_ASSOC (0xf<<4)
|
|
#define AC_DEFCFG_ASSOC_SHIFT 4
|
|
#define AC_DEFCFG_MISC (0xf<<8)
|
|
#define AC_DEFCFG_MISC_SHIFT 8
|
|
#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
|
|
#define AC_DEFCFG_COLOR (0xf<<12)
|
|
#define AC_DEFCFG_COLOR_SHIFT 12
|
|
#define AC_DEFCFG_CONN_TYPE (0xf<<16)
|
|
#define AC_DEFCFG_CONN_TYPE_SHIFT 16
|
|
#define AC_DEFCFG_DEVICE (0xf<<20)
|
|
#define AC_DEFCFG_DEVICE_SHIFT 20
|
|
#define AC_DEFCFG_LOCATION (0x3f<<24)
|
|
#define AC_DEFCFG_LOCATION_SHIFT 24
|
|
#define AC_DEFCFG_PORT_CONN (0x3<<30)
|
|
#define AC_DEFCFG_PORT_CONN_SHIFT 30
|
|
|
|
/* device device types (0x0-0xf) */
|
|
enum {
|
|
AC_JACK_LINE_OUT,
|
|
AC_JACK_SPEAKER,
|
|
AC_JACK_HP_OUT,
|
|
AC_JACK_CD,
|
|
AC_JACK_SPDIF_OUT,
|
|
AC_JACK_DIG_OTHER_OUT,
|
|
AC_JACK_MODEM_LINE_SIDE,
|
|
AC_JACK_MODEM_HAND_SIDE,
|
|
AC_JACK_LINE_IN,
|
|
AC_JACK_AUX,
|
|
AC_JACK_MIC_IN,
|
|
AC_JACK_TELEPHONY,
|
|
AC_JACK_SPDIF_IN,
|
|
AC_JACK_DIG_OTHER_IN,
|
|
AC_JACK_OTHER = 0xf,
|
|
};
|
|
|
|
/* jack connection types (0x0-0xf) */
|
|
enum {
|
|
AC_JACK_CONN_UNKNOWN,
|
|
AC_JACK_CONN_1_8,
|
|
AC_JACK_CONN_1_4,
|
|
AC_JACK_CONN_ATAPI,
|
|
AC_JACK_CONN_RCA,
|
|
AC_JACK_CONN_OPTICAL,
|
|
AC_JACK_CONN_OTHER_DIGITAL,
|
|
AC_JACK_CONN_OTHER_ANALOG,
|
|
AC_JACK_CONN_DIN,
|
|
AC_JACK_CONN_XLR,
|
|
AC_JACK_CONN_RJ11,
|
|
AC_JACK_CONN_COMB,
|
|
AC_JACK_CONN_OTHER = 0xf,
|
|
};
|
|
|
|
/* jack colors (0x0-0xf) */
|
|
enum {
|
|
AC_JACK_COLOR_UNKNOWN,
|
|
AC_JACK_COLOR_BLACK,
|
|
AC_JACK_COLOR_GREY,
|
|
AC_JACK_COLOR_BLUE,
|
|
AC_JACK_COLOR_GREEN,
|
|
AC_JACK_COLOR_RED,
|
|
AC_JACK_COLOR_ORANGE,
|
|
AC_JACK_COLOR_YELLOW,
|
|
AC_JACK_COLOR_PURPLE,
|
|
AC_JACK_COLOR_PINK,
|
|
AC_JACK_COLOR_WHITE = 0xe,
|
|
AC_JACK_COLOR_OTHER,
|
|
};
|
|
|
|
/* Jack location (0x0-0x3f) */
|
|
/* common case */
|
|
enum {
|
|
AC_JACK_LOC_NONE,
|
|
AC_JACK_LOC_REAR,
|
|
AC_JACK_LOC_FRONT,
|
|
AC_JACK_LOC_LEFT,
|
|
AC_JACK_LOC_RIGHT,
|
|
AC_JACK_LOC_TOP,
|
|
AC_JACK_LOC_BOTTOM,
|
|
};
|
|
/* bits 4-5 */
|
|
enum {
|
|
AC_JACK_LOC_EXTERNAL = 0x00,
|
|
AC_JACK_LOC_INTERNAL = 0x10,
|
|
AC_JACK_LOC_SEPARATE = 0x20,
|
|
AC_JACK_LOC_OTHER = 0x30,
|
|
};
|
|
enum {
|
|
/* external on primary chasis */
|
|
AC_JACK_LOC_REAR_PANEL = 0x07,
|
|
AC_JACK_LOC_DRIVE_BAY,
|
|
/* internal */
|
|
AC_JACK_LOC_RISER = 0x17,
|
|
AC_JACK_LOC_HDMI,
|
|
AC_JACK_LOC_ATAPI,
|
|
/* others */
|
|
AC_JACK_LOC_MOBILE_IN = 0x37,
|
|
AC_JACK_LOC_MOBILE_OUT,
|
|
};
|
|
|
|
/* Port connectivity (0-3) */
|
|
enum {
|
|
AC_JACK_PORT_COMPLEX,
|
|
AC_JACK_PORT_NONE,
|
|
AC_JACK_PORT_FIXED,
|
|
AC_JACK_PORT_BOTH,
|
|
};
|
|
|
|
/* max. codec address */
|
|
#define HDA_MAX_CODEC_ADDRESS 0x0f
|
|
|
|
/*
|
|
* generic arrays
|
|
*/
|
|
struct snd_array {
|
|
unsigned int used;
|
|
unsigned int alloced;
|
|
unsigned int elem_size;
|
|
unsigned int alloc_align;
|
|
void *list;
|
|
};
|
|
|
|
void *snd_array_new(struct snd_array *array);
|
|
void snd_array_free(struct snd_array *array);
|
|
static inline void snd_array_init(struct snd_array *array, unsigned int size,
|
|
unsigned int align)
|
|
{
|
|
array->elem_size = size;
|
|
array->alloc_align = align;
|
|
}
|
|
|
|
static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
|
|
{
|
|
return array->list + idx * array->elem_size;
|
|
}
|
|
|
|
static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
|
|
{
|
|
return (unsigned long)(ptr - array->list) / array->elem_size;
|
|
}
|
|
|
|
/*
|
|
* Structures
|
|
*/
|
|
|
|
struct hda_bus;
|
|
struct hda_beep;
|
|
struct hda_codec;
|
|
struct hda_pcm;
|
|
struct hda_pcm_stream;
|
|
struct hda_bus_unsolicited;
|
|
|
|
/* NID type */
|
|
typedef u16 hda_nid_t;
|
|
|
|
/* bus operators */
|
|
struct hda_bus_ops {
|
|
/* send a single command */
|
|
int (*command)(struct hda_bus *bus, unsigned int cmd);
|
|
/* get a response from the last command */
|
|
unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
|
|
/* free the private data */
|
|
void (*private_free)(struct hda_bus *);
|
|
/* attach a PCM stream */
|
|
int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
|
|
struct hda_pcm *pcm);
|
|
/* reset bus for retry verb */
|
|
void (*bus_reset)(struct hda_bus *bus);
|
|
#ifdef CONFIG_PM
|
|
/* notify power-up/down from codec to controller */
|
|
void (*pm_notify)(struct hda_bus *bus, bool power_up);
|
|
#endif
|
|
#ifdef CONFIG_SND_HDA_DSP_LOADER
|
|
/* prepare DSP transfer */
|
|
int (*load_dsp_prepare)(struct hda_bus *bus, unsigned int format,
|
|
unsigned int byte_size,
|
|
struct snd_dma_buffer *bufp);
|
|
/* start/stop DSP transfer */
|
|
void (*load_dsp_trigger)(struct hda_bus *bus, bool start);
|
|
/* clean up DSP transfer */
|
|
void (*load_dsp_cleanup)(struct hda_bus *bus,
|
|
struct snd_dma_buffer *dmab);
|
|
#endif
|
|
};
|
|
|
|
/* template to pass to the bus constructor */
|
|
struct hda_bus_template {
|
|
void *private_data;
|
|
struct pci_dev *pci;
|
|
const char *modelname;
|
|
int *power_save;
|
|
struct hda_bus_ops ops;
|
|
};
|
|
|
|
/*
|
|
* codec bus
|
|
*
|
|
* each controller needs to creata a hda_bus to assign the accessor.
|
|
* A hda_bus contains several codecs in the list codec_list.
|
|
*/
|
|
struct hda_bus {
|
|
struct snd_card *card;
|
|
|
|
/* copied from template */
|
|
void *private_data;
|
|
struct pci_dev *pci;
|
|
const char *modelname;
|
|
int *power_save;
|
|
struct hda_bus_ops ops;
|
|
|
|
/* codec linked list */
|
|
struct list_head codec_list;
|
|
/* link caddr -> codec */
|
|
struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
|
|
|
|
struct mutex cmd_mutex;
|
|
struct mutex prepare_mutex;
|
|
|
|
/* unsolicited event queue */
|
|
struct hda_bus_unsolicited *unsol;
|
|
char workq_name[16];
|
|
struct workqueue_struct *workq; /* common workqueue for codecs */
|
|
|
|
/* assigned PCMs */
|
|
DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
|
|
|
|
/* misc op flags */
|
|
unsigned int needs_damn_long_delay :1;
|
|
unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
|
|
unsigned int sync_write:1; /* sync after verb write */
|
|
/* status for codec/controller */
|
|
unsigned int shutdown :1; /* being unloaded */
|
|
unsigned int rirb_error:1; /* error in codec communication */
|
|
unsigned int response_reset:1; /* controller was reset */
|
|
unsigned int in_reset:1; /* during reset operation */
|
|
unsigned int power_keep_link_on:1; /* don't power off HDA link */
|
|
|
|
int primary_dig_out_type; /* primary digital out PCM type */
|
|
};
|
|
|
|
/*
|
|
* codec preset
|
|
*
|
|
* Known codecs have the patch to build and set up the controls/PCMs
|
|
* better than the generic parser.
|
|
*/
|
|
struct hda_codec_preset {
|
|
unsigned int id;
|
|
unsigned int mask;
|
|
unsigned int subs;
|
|
unsigned int subs_mask;
|
|
unsigned int rev;
|
|
hda_nid_t afg, mfg;
|
|
const char *name;
|
|
int (*patch)(struct hda_codec *codec);
|
|
};
|
|
|
|
struct hda_codec_preset_list {
|
|
const struct hda_codec_preset *preset;
|
|
struct module *owner;
|
|
struct list_head list;
|
|
};
|
|
|
|
/* initial hook */
|
|
int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
|
|
int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
|
|
|
|
/* ops set by the preset patch */
|
|
struct hda_codec_ops {
|
|
int (*build_controls)(struct hda_codec *codec);
|
|
int (*build_pcms)(struct hda_codec *codec);
|
|
int (*init)(struct hda_codec *codec);
|
|
void (*free)(struct hda_codec *codec);
|
|
void (*unsol_event)(struct hda_codec *codec, unsigned int res);
|
|
void (*set_power_state)(struct hda_codec *codec, hda_nid_t fg,
|
|
unsigned int power_state);
|
|
#ifdef CONFIG_PM
|
|
int (*suspend)(struct hda_codec *codec);
|
|
int (*resume)(struct hda_codec *codec);
|
|
int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
|
|
#endif
|
|
void (*reboot_notify)(struct hda_codec *codec);
|
|
};
|
|
|
|
/* record for amp information cache */
|
|
struct hda_cache_head {
|
|
u32 key:31; /* hash key */
|
|
u32 dirty:1;
|
|
u16 val; /* assigned value */
|
|
u16 next;
|
|
};
|
|
|
|
struct hda_amp_info {
|
|
struct hda_cache_head head;
|
|
u32 amp_caps; /* amp capabilities */
|
|
u16 vol[2]; /* current volume & mute */
|
|
};
|
|
|
|
struct hda_cache_rec {
|
|
u16 hash[64]; /* hash table for index */
|
|
struct snd_array buf; /* record entries */
|
|
};
|
|
|
|
/* PCM callbacks */
|
|
struct hda_pcm_ops {
|
|
int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
|
|
struct snd_pcm_substream *substream);
|
|
int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
|
|
struct snd_pcm_substream *substream);
|
|
int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
|
|
unsigned int stream_tag, unsigned int format,
|
|
struct snd_pcm_substream *substream);
|
|
int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
|
|
struct snd_pcm_substream *substream);
|
|
};
|
|
|
|
/* PCM information for each substream */
|
|
struct hda_pcm_stream {
|
|
unsigned int substreams; /* number of substreams, 0 = not exist*/
|
|
unsigned int channels_min; /* min. number of channels */
|
|
unsigned int channels_max; /* max. number of channels */
|
|
hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
|
|
u32 rates; /* supported rates */
|
|
u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
|
|
unsigned int maxbps; /* supported max. bit per sample */
|
|
const struct snd_pcm_chmap_elem *chmap; /* chmap to override */
|
|
struct hda_pcm_ops ops;
|
|
};
|
|
|
|
/* PCM types */
|
|
enum {
|
|
HDA_PCM_TYPE_AUDIO,
|
|
HDA_PCM_TYPE_SPDIF,
|
|
HDA_PCM_TYPE_HDMI,
|
|
HDA_PCM_TYPE_MODEM,
|
|
HDA_PCM_NTYPES
|
|
};
|
|
|
|
/* for PCM creation */
|
|
struct hda_pcm {
|
|
char *name;
|
|
struct hda_pcm_stream stream[2];
|
|
unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
|
|
int device; /* device number to assign */
|
|
struct snd_pcm *pcm; /* assigned PCM instance */
|
|
bool own_chmap; /* codec driver provides own channel maps */
|
|
};
|
|
|
|
/* codec information */
|
|
struct hda_codec {
|
|
struct hda_bus *bus;
|
|
unsigned int addr; /* codec addr*/
|
|
struct list_head list; /* list point */
|
|
|
|
hda_nid_t afg; /* AFG node id */
|
|
hda_nid_t mfg; /* MFG node id */
|
|
|
|
/* ids */
|
|
u8 afg_function_id;
|
|
u8 mfg_function_id;
|
|
u8 afg_unsol;
|
|
u8 mfg_unsol;
|
|
u32 vendor_id;
|
|
u32 subsystem_id;
|
|
u32 revision_id;
|
|
|
|
/* detected preset */
|
|
const struct hda_codec_preset *preset;
|
|
struct module *owner;
|
|
const char *vendor_name; /* codec vendor name */
|
|
const char *chip_name; /* codec chip name */
|
|
const char *modelname; /* model name for preset */
|
|
|
|
/* set by patch */
|
|
struct hda_codec_ops patch_ops;
|
|
|
|
/* PCM to create, set by patch_ops.build_pcms callback */
|
|
unsigned int num_pcms;
|
|
struct hda_pcm *pcm_info;
|
|
|
|
/* codec specific info */
|
|
void *spec;
|
|
|
|
/* beep device */
|
|
struct hda_beep *beep;
|
|
unsigned int beep_mode;
|
|
|
|
/* widget capabilities cache */
|
|
unsigned int num_nodes;
|
|
hda_nid_t start_nid;
|
|
u32 *wcaps;
|
|
|
|
struct snd_array mixers; /* list of assigned mixer elements */
|
|
struct snd_array nids; /* list of mapped mixer elements */
|
|
|
|
struct hda_cache_rec amp_cache; /* cache for amp access */
|
|
struct hda_cache_rec cmd_cache; /* cache for other commands */
|
|
|
|
struct list_head conn_list; /* linked-list of connection-list */
|
|
|
|
struct mutex spdif_mutex;
|
|
struct mutex control_mutex;
|
|
struct mutex hash_mutex;
|
|
struct snd_array spdif_out;
|
|
unsigned int spdif_in_enable; /* SPDIF input enable? */
|
|
const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
|
|
struct snd_array init_pins; /* initial (BIOS) pin configurations */
|
|
struct snd_array driver_pins; /* pin configs set by codec parser */
|
|
struct snd_array cvt_setups; /* audio convert setups */
|
|
|
|
#ifdef CONFIG_SND_HDA_HWDEP
|
|
struct mutex user_mutex;
|
|
struct snd_hwdep *hwdep; /* assigned hwdep device */
|
|
struct snd_array init_verbs; /* additional init verbs */
|
|
struct snd_array hints; /* additional hints */
|
|
struct snd_array user_pins; /* default pin configs to override */
|
|
#endif
|
|
|
|
/* misc flags */
|
|
unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
|
|
* status change
|
|
* (e.g. Realtek codecs)
|
|
*/
|
|
unsigned int pin_amp_workaround:1; /* pin out-amp takes index
|
|
* (e.g. Conexant codecs)
|
|
*/
|
|
unsigned int single_adc_amp:1; /* adc in-amp takes no index
|
|
* (e.g. CX20549 codec)
|
|
*/
|
|
unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
|
|
unsigned int pins_shutup:1; /* pins are shut up */
|
|
unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
|
|
unsigned int no_jack_detect:1; /* Machine has no jack-detection */
|
|
unsigned int inv_eapd:1; /* broken h/w: inverted EAPD control */
|
|
unsigned int inv_jack_detect:1; /* broken h/w: inverted detection bit */
|
|
unsigned int pcm_format_first:1; /* PCM format must be set first */
|
|
unsigned int epss:1; /* supporting EPSS? */
|
|
unsigned int cached_write:1; /* write only to caches */
|
|
#ifdef CONFIG_PM
|
|
unsigned int power_on :1; /* current (global) power-state */
|
|
unsigned int d3_stop_clk:1; /* support D3 operation without BCLK */
|
|
unsigned int pm_down_notified:1; /* PM notified to controller */
|
|
unsigned int in_pm:1; /* suspend/resume being performed */
|
|
int power_transition; /* power-state in transition */
|
|
int power_count; /* current (global) power refcount */
|
|
struct delayed_work power_work; /* delayed task for powerdown */
|
|
unsigned long power_on_acct;
|
|
unsigned long power_off_acct;
|
|
unsigned long power_jiffies;
|
|
spinlock_t power_lock;
|
|
#endif
|
|
|
|
/* filter the requested power state per nid */
|
|
unsigned int (*power_filter)(struct hda_codec *codec, hda_nid_t nid,
|
|
unsigned int power_state);
|
|
|
|
/* codec-specific additional proc output */
|
|
void (*proc_widget_hook)(struct snd_info_buffer *buffer,
|
|
struct hda_codec *codec, hda_nid_t nid);
|
|
|
|
/* jack detection */
|
|
struct snd_array jacktbl;
|
|
unsigned long jackpoll_interval; /* In jiffies. Zero means no poll, rely on unsol events */
|
|
struct delayed_work jackpoll_work;
|
|
|
|
#ifdef CONFIG_SND_HDA_INPUT_JACK
|
|
/* jack detection */
|
|
struct snd_array jacks;
|
|
#endif
|
|
|
|
/* fix-up list */
|
|
int fixup_id;
|
|
const struct hda_fixup *fixup_list;
|
|
const char *fixup_name;
|
|
|
|
/* additional init verbs */
|
|
struct snd_array verbs;
|
|
};
|
|
|
|
/* direction */
|
|
enum {
|
|
HDA_INPUT, HDA_OUTPUT
|
|
};
|
|
|
|
|
|
/*
|
|
* constructors
|
|
*/
|
|
int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
|
|
struct hda_bus **busp);
|
|
int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
|
|
struct hda_codec **codecp);
|
|
int snd_hda_codec_configure(struct hda_codec *codec);
|
|
int snd_hda_codec_update_widgets(struct hda_codec *codec);
|
|
|
|
/*
|
|
* low level functions
|
|
*/
|
|
unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
|
|
int direct,
|
|
unsigned int verb, unsigned int parm);
|
|
int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
|
|
unsigned int verb, unsigned int parm);
|
|
#define snd_hda_param_read(codec, nid, param) \
|
|
snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
|
|
int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
|
|
hda_nid_t *start_id);
|
|
int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
|
|
hda_nid_t *conn_list, int max_conns);
|
|
static inline int
|
|
snd_hda_get_num_conns(struct hda_codec *codec, hda_nid_t nid)
|
|
{
|
|
return snd_hda_get_connections(codec, nid, NULL, 0);
|
|
}
|
|
int snd_hda_get_num_raw_conns(struct hda_codec *codec, hda_nid_t nid);
|
|
int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid,
|
|
hda_nid_t *conn_list, int max_conns);
|
|
int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid,
|
|
const hda_nid_t **listp);
|
|
int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int nums,
|
|
const hda_nid_t *list);
|
|
int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux,
|
|
hda_nid_t nid, int recursive);
|
|
int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
|
|
u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
|
|
|
|
struct hda_verb {
|
|
hda_nid_t nid;
|
|
u32 verb;
|
|
u32 param;
|
|
};
|
|
|
|
void snd_hda_sequence_write(struct hda_codec *codec,
|
|
const struct hda_verb *seq);
|
|
|
|
/* unsolicited event */
|
|
int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
|
|
|
|
/* cached write */
|
|
int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
|
|
int direct, unsigned int verb, unsigned int parm);
|
|
void snd_hda_sequence_write_cache(struct hda_codec *codec,
|
|
const struct hda_verb *seq);
|
|
int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
|
|
int direct, unsigned int verb, unsigned int parm);
|
|
void snd_hda_codec_resume_cache(struct hda_codec *codec);
|
|
/* both for cmd & amp caches */
|
|
void snd_hda_codec_flush_cache(struct hda_codec *codec);
|
|
|
|
/* the struct for codec->pin_configs */
|
|
struct hda_pincfg {
|
|
hda_nid_t nid;
|
|
unsigned char ctrl; /* original pin control value */
|
|
unsigned char target; /* target pin control value */
|
|
unsigned int cfg; /* default configuration */
|
|
};
|
|
|
|
unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
|
|
int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
|
|
unsigned int cfg);
|
|
int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
|
|
hda_nid_t nid, unsigned int cfg); /* for hwdep */
|
|
void snd_hda_shutup_pins(struct hda_codec *codec);
|
|
|
|
/* SPDIF controls */
|
|
struct hda_spdif_out {
|
|
hda_nid_t nid; /* Converter nid values relate to */
|
|
unsigned int status; /* IEC958 status bits */
|
|
unsigned short ctls; /* SPDIF control bits */
|
|
};
|
|
struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec,
|
|
hda_nid_t nid);
|
|
void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx);
|
|
void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid);
|
|
|
|
/*
|
|
* Mixer
|
|
*/
|
|
int snd_hda_build_controls(struct hda_bus *bus);
|
|
int snd_hda_codec_build_controls(struct hda_codec *codec);
|
|
|
|
/*
|
|
* PCM
|
|
*/
|
|
int snd_hda_build_pcms(struct hda_bus *bus);
|
|
int snd_hda_codec_build_pcms(struct hda_codec *codec);
|
|
|
|
int snd_hda_codec_prepare(struct hda_codec *codec,
|
|
struct hda_pcm_stream *hinfo,
|
|
unsigned int stream,
|
|
unsigned int format,
|
|
struct snd_pcm_substream *substream);
|
|
void snd_hda_codec_cleanup(struct hda_codec *codec,
|
|
struct hda_pcm_stream *hinfo,
|
|
struct snd_pcm_substream *substream);
|
|
|
|
void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
|
|
u32 stream_tag,
|
|
int channel_id, int format);
|
|
void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
|
|
int do_now);
|
|
#define snd_hda_codec_cleanup_stream(codec, nid) \
|
|
__snd_hda_codec_cleanup_stream(codec, nid, 0)
|
|
unsigned int snd_hda_calc_stream_format(unsigned int rate,
|
|
unsigned int channels,
|
|
unsigned int format,
|
|
unsigned int maxbps,
|
|
unsigned short spdif_ctls);
|
|
int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
|
|
unsigned int format);
|
|
|
|
extern const struct snd_pcm_chmap_elem snd_pcm_2_1_chmaps[];
|
|
|
|
/*
|
|
* Misc
|
|
*/
|
|
void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
|
|
void snd_hda_bus_reboot_notify(struct hda_bus *bus);
|
|
void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg,
|
|
unsigned int power_state);
|
|
|
|
int snd_hda_lock_devices(struct hda_bus *bus);
|
|
void snd_hda_unlock_devices(struct hda_bus *bus);
|
|
|
|
/*
|
|
* power management
|
|
*/
|
|
#ifdef CONFIG_PM
|
|
int snd_hda_suspend(struct hda_bus *bus);
|
|
int snd_hda_resume(struct hda_bus *bus);
|
|
#endif
|
|
|
|
static inline
|
|
int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
|
|
{
|
|
#ifdef CONFIG_PM
|
|
if (codec->patch_ops.check_power_status)
|
|
return codec->patch_ops.check_power_status(codec, nid);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* get widget information
|
|
*/
|
|
const char *snd_hda_get_jack_connectivity(u32 cfg);
|
|
const char *snd_hda_get_jack_type(u32 cfg);
|
|
const char *snd_hda_get_jack_location(u32 cfg);
|
|
|
|
/*
|
|
* power saving
|
|
*/
|
|
#ifdef CONFIG_PM
|
|
void snd_hda_power_save(struct hda_codec *codec, int delta, bool d3wait);
|
|
void snd_hda_update_power_acct(struct hda_codec *codec);
|
|
#else
|
|
static inline void snd_hda_power_save(struct hda_codec *codec, int delta,
|
|
bool d3wait) {}
|
|
#endif
|
|
|
|
/**
|
|
* snd_hda_power_up - Power-up the codec
|
|
* @codec: HD-audio codec
|
|
*
|
|
* Increment the power-up counter and power up the hardware really when
|
|
* not turned on yet.
|
|
*/
|
|
static inline void snd_hda_power_up(struct hda_codec *codec)
|
|
{
|
|
snd_hda_power_save(codec, 1, false);
|
|
}
|
|
|
|
/**
|
|
* snd_hda_power_up_d3wait - Power-up the codec after waiting for any pending
|
|
* D3 transition to complete. This differs from snd_hda_power_up() when
|
|
* power_transition == -1. snd_hda_power_up sees this case as a nop,
|
|
* snd_hda_power_up_d3wait waits for the D3 transition to complete then powers
|
|
* back up.
|
|
* @codec: HD-audio codec
|
|
*
|
|
* Cancel any power down operation hapenning on the work queue, then power up.
|
|
*/
|
|
static inline void snd_hda_power_up_d3wait(struct hda_codec *codec)
|
|
{
|
|
snd_hda_power_save(codec, 1, true);
|
|
}
|
|
|
|
/**
|
|
* snd_hda_power_down - Power-down the codec
|
|
* @codec: HD-audio codec
|
|
*
|
|
* Decrement the power-up counter and schedules the power-off work if
|
|
* the counter rearches to zero.
|
|
*/
|
|
static inline void snd_hda_power_down(struct hda_codec *codec)
|
|
{
|
|
snd_hda_power_save(codec, -1, false);
|
|
}
|
|
|
|
/**
|
|
* snd_hda_power_sync - Synchronize the power-save status
|
|
* @codec: HD-audio codec
|
|
*
|
|
* Synchronize the actual power state with the power account;
|
|
* called when power_save parameter is changed
|
|
*/
|
|
static inline void snd_hda_power_sync(struct hda_codec *codec)
|
|
{
|
|
snd_hda_power_save(codec, 0, false);
|
|
}
|
|
|
|
#ifdef CONFIG_SND_HDA_PATCH_LOADER
|
|
/*
|
|
* patch firmware
|
|
*/
|
|
int snd_hda_load_patch(struct hda_bus *bus, size_t size, const void *buf);
|
|
#endif
|
|
|
|
#ifdef CONFIG_SND_HDA_DSP_LOADER
|
|
static inline int
|
|
snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
|
|
unsigned int size,
|
|
struct snd_dma_buffer *bufp)
|
|
{
|
|
return codec->bus->ops.load_dsp_prepare(codec->bus, format, size, bufp);
|
|
}
|
|
static inline void
|
|
snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start)
|
|
{
|
|
return codec->bus->ops.load_dsp_trigger(codec->bus, start);
|
|
}
|
|
static inline void
|
|
snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
|
|
struct snd_dma_buffer *dmab)
|
|
{
|
|
return codec->bus->ops.load_dsp_cleanup(codec->bus, dmab);
|
|
}
|
|
#else
|
|
static inline int
|
|
snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
|
|
unsigned int size,
|
|
struct snd_dma_buffer *bufp)
|
|
{
|
|
return -ENOSYS;
|
|
}
|
|
static inline void
|
|
snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start) {}
|
|
static inline void
|
|
snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
|
|
struct snd_dma_buffer *dmab) {}
|
|
#endif
|
|
|
|
/*
|
|
* Codec modularization
|
|
*/
|
|
|
|
/* Export symbols only for communication with codec drivers;
|
|
* When built in kernel, all HD-audio drivers are supposed to be statically
|
|
* linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
|
|
* exported unless it's built as a module.
|
|
*/
|
|
#ifdef MODULE
|
|
#define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
|
|
#else
|
|
#define EXPORT_SYMBOL_HDA(sym)
|
|
#endif
|
|
|
|
#endif /* __SOUND_HDA_CODEC_H */
|