![David Brownell](/assets/img/avatar_default.png)
Some issues were recently turned up with the current specification of what it means for spi_transfer.tx_buf to be null, as part of transfers which are (from the SPI protocol driver perspective) pure reads. Specifically, that it seems better to change the TX behaviour there from "undefined" to "will shift zeroes". This lets protocol drivers (like the ads7846 driver) depend on that behavior. It's what most controller drivers in the tree are already doing (with one exception and one case of driver wanting-to-oops), it's what Microwire hardware will necessarily be doing, and it removes an issue whereby certain security audits would need to define such a value anyway as part of removing covert channels. This patch changes the specification to require shifting zeroes, and updates all currently merged SPI controller drivers to do so. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
453 lines
9.4 KiB
C
453 lines
9.4 KiB
C
/* linux/drivers/spi/spi_s3c24xx.c
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*
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* Copyright (c) 2006 Ben Dooks
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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//#define DEBUG
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/hardware.h>
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/regs-spi.h>
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#include <asm/arch/spi.h>
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struct s3c24xx_spi {
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/* bitbang has to be first */
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struct spi_bitbang bitbang;
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struct completion done;
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void __iomem *regs;
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int irq;
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int len;
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int count;
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/* data buffers */
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const unsigned char *tx;
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unsigned char *rx;
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struct clk *clk;
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struct resource *ioarea;
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struct spi_master *master;
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struct spi_device *curdev;
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struct device *dev;
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struct s3c2410_spi_info *pdata;
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};
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#define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT)
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#define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP)
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static inline struct s3c24xx_spi *to_hw(struct spi_device *sdev)
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{
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return spi_master_get_devdata(sdev->master);
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}
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static void s3c24xx_spi_chipsel(struct spi_device *spi, int value)
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{
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struct s3c24xx_spi *hw = to_hw(spi);
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unsigned int cspol = spi->mode & SPI_CS_HIGH ? 1 : 0;
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unsigned int spcon;
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switch (value) {
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case BITBANG_CS_INACTIVE:
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if (hw->pdata->set_cs)
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hw->pdata->set_cs(hw->pdata, value, cspol);
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else
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s3c2410_gpio_setpin(hw->pdata->pin_cs, cspol ^ 1);
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break;
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case BITBANG_CS_ACTIVE:
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spcon = readb(hw->regs + S3C2410_SPCON);
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if (spi->mode & SPI_CPHA)
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spcon |= S3C2410_SPCON_CPHA_FMTB;
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else
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spcon &= ~S3C2410_SPCON_CPHA_FMTB;
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if (spi->mode & SPI_CPOL)
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spcon |= S3C2410_SPCON_CPOL_HIGH;
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else
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spcon &= ~S3C2410_SPCON_CPOL_HIGH;
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spcon |= S3C2410_SPCON_ENSCK;
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/* write new configration */
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writeb(spcon, hw->regs + S3C2410_SPCON);
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if (hw->pdata->set_cs)
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hw->pdata->set_cs(hw->pdata, value, cspol);
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else
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s3c2410_gpio_setpin(hw->pdata->pin_cs, cspol);
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break;
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}
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}
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static int s3c24xx_spi_setupxfer(struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct s3c24xx_spi *hw = to_hw(spi);
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unsigned int bpw;
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unsigned int hz;
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unsigned int div;
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bpw = t ? t->bits_per_word : spi->bits_per_word;
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hz = t ? t->speed_hz : spi->max_speed_hz;
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if (bpw != 8) {
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dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
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return -EINVAL;
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}
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div = clk_get_rate(hw->clk) / hz;
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/* is clk = pclk / (2 * (pre+1)), or is it
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* clk = (pclk * 2) / ( pre + 1) */
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div = (div / 2) - 1;
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if (div < 0)
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div = 1;
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if (div > 255)
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div = 255;
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dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz);
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writeb(div, hw->regs + S3C2410_SPPRE);
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spin_lock(&hw->bitbang.lock);
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if (!hw->bitbang.busy) {
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hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE);
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/* need to ndelay for 0.5 clocktick ? */
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}
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spin_unlock(&hw->bitbang.lock);
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return 0;
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}
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static int s3c24xx_spi_setup(struct spi_device *spi)
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{
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int ret;
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if (!spi->bits_per_word)
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spi->bits_per_word = 8;
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if ((spi->mode & SPI_LSB_FIRST) != 0)
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return -EINVAL;
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ret = s3c24xx_spi_setupxfer(spi, NULL);
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if (ret < 0) {
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dev_err(&spi->dev, "setupxfer returned %d\n", ret);
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return ret;
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}
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dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n",
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__FUNCTION__, spi->mode, spi->bits_per_word,
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spi->max_speed_hz);
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return 0;
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}
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static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count)
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{
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return hw->tx ? hw->tx[count] : 0;
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}
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static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
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{
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struct s3c24xx_spi *hw = to_hw(spi);
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dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
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t->tx_buf, t->rx_buf, t->len);
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hw->tx = t->tx_buf;
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hw->rx = t->rx_buf;
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hw->len = t->len;
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hw->count = 0;
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/* send the first byte */
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writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
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wait_for_completion(&hw->done);
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return hw->count;
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}
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static irqreturn_t s3c24xx_spi_irq(int irq, void *dev)
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{
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struct s3c24xx_spi *hw = dev;
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unsigned int spsta = readb(hw->regs + S3C2410_SPSTA);
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unsigned int count = hw->count;
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if (spsta & S3C2410_SPSTA_DCOL) {
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dev_dbg(hw->dev, "data-collision\n");
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complete(&hw->done);
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goto irq_done;
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}
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if (!(spsta & S3C2410_SPSTA_READY)) {
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dev_dbg(hw->dev, "spi not ready for tx?\n");
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complete(&hw->done);
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goto irq_done;
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}
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hw->count++;
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if (hw->rx)
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hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
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count++;
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if (count < hw->len)
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writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
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else
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complete(&hw->done);
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irq_done:
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return IRQ_HANDLED;
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}
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static int s3c24xx_spi_probe(struct platform_device *pdev)
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{
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struct s3c24xx_spi *hw;
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struct spi_master *master;
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struct spi_board_info *bi;
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struct resource *res;
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int err = 0;
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int i;
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master = spi_alloc_master(&pdev->dev, sizeof(struct s3c24xx_spi));
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if (master == NULL) {
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dev_err(&pdev->dev, "No memory for spi_master\n");
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err = -ENOMEM;
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goto err_nomem;
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}
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hw = spi_master_get_devdata(master);
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memset(hw, 0, sizeof(struct s3c24xx_spi));
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hw->master = spi_master_get(master);
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hw->pdata = pdev->dev.platform_data;
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hw->dev = &pdev->dev;
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if (hw->pdata == NULL) {
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dev_err(&pdev->dev, "No platform data supplied\n");
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err = -ENOENT;
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goto err_no_pdata;
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}
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platform_set_drvdata(pdev, hw);
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init_completion(&hw->done);
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/* setup the state for the bitbang driver */
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hw->bitbang.master = hw->master;
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hw->bitbang.setup_transfer = s3c24xx_spi_setupxfer;
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hw->bitbang.chipselect = s3c24xx_spi_chipsel;
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hw->bitbang.txrx_bufs = s3c24xx_spi_txrx;
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hw->bitbang.master->setup = s3c24xx_spi_setup;
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dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang);
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/* find and map our resources */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
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err = -ENOENT;
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goto err_no_iores;
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}
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hw->ioarea = request_mem_region(res->start, (res->end - res->start)+1,
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pdev->name);
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if (hw->ioarea == NULL) {
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dev_err(&pdev->dev, "Cannot reserve region\n");
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err = -ENXIO;
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goto err_no_iores;
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}
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hw->regs = ioremap(res->start, (res->end - res->start)+1);
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if (hw->regs == NULL) {
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dev_err(&pdev->dev, "Cannot map IO\n");
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err = -ENXIO;
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goto err_no_iomap;
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}
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hw->irq = platform_get_irq(pdev, 0);
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if (hw->irq < 0) {
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dev_err(&pdev->dev, "No IRQ specified\n");
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err = -ENOENT;
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goto err_no_irq;
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}
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err = request_irq(hw->irq, s3c24xx_spi_irq, 0, pdev->name, hw);
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if (err) {
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dev_err(&pdev->dev, "Cannot claim IRQ\n");
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goto err_no_irq;
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}
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hw->clk = clk_get(&pdev->dev, "spi");
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if (IS_ERR(hw->clk)) {
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dev_err(&pdev->dev, "No clock for device\n");
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err = PTR_ERR(hw->clk);
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goto err_no_clk;
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}
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/* for the moment, permanently enable the clock */
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clk_enable(hw->clk);
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/* program defaults into the registers */
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writeb(0xff, hw->regs + S3C2410_SPPRE);
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writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
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writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
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/* setup any gpio we can */
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if (!hw->pdata->set_cs) {
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s3c2410_gpio_setpin(hw->pdata->pin_cs, 1);
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s3c2410_gpio_cfgpin(hw->pdata->pin_cs, S3C2410_GPIO_OUTPUT);
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}
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/* register our spi controller */
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err = spi_bitbang_start(&hw->bitbang);
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if (err) {
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dev_err(&pdev->dev, "Failed to register SPI master\n");
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goto err_register;
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}
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dev_dbg(hw->dev, "shutdown=%d\n", hw->bitbang.shutdown);
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/* register all the devices associated */
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bi = &hw->pdata->board_info[0];
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for (i = 0; i < hw->pdata->board_size; i++, bi++) {
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dev_info(hw->dev, "registering %s\n", bi->modalias);
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bi->controller_data = hw;
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spi_new_device(master, bi);
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}
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return 0;
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err_register:
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clk_disable(hw->clk);
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clk_put(hw->clk);
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err_no_clk:
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free_irq(hw->irq, hw);
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err_no_irq:
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iounmap(hw->regs);
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err_no_iomap:
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release_resource(hw->ioarea);
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kfree(hw->ioarea);
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err_no_iores:
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err_no_pdata:
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spi_master_put(hw->master);;
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err_nomem:
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return err;
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}
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static int s3c24xx_spi_remove(struct platform_device *dev)
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{
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struct s3c24xx_spi *hw = platform_get_drvdata(dev);
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platform_set_drvdata(dev, NULL);
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spi_unregister_master(hw->master);
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clk_disable(hw->clk);
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clk_put(hw->clk);
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free_irq(hw->irq, hw);
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iounmap(hw->regs);
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release_resource(hw->ioarea);
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kfree(hw->ioarea);
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spi_master_put(hw->master);
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return 0;
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}
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#ifdef CONFIG_PM
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static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg)
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{
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struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
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clk_disable(hw->clk);
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return 0;
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}
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static int s3c24xx_spi_resume(struct platform_device *pdev)
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{
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struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
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clk_enable(hw->clk);
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return 0;
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}
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#else
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#define s3c24xx_spi_suspend NULL
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#define s3c24xx_spi_resume NULL
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#endif
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static struct platform_driver s3c24xx_spidrv = {
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.probe = s3c24xx_spi_probe,
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.remove = s3c24xx_spi_remove,
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.suspend = s3c24xx_spi_suspend,
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.resume = s3c24xx_spi_resume,
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.driver = {
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.name = "s3c2410-spi",
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.owner = THIS_MODULE,
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},
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};
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static int __init s3c24xx_spi_init(void)
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{
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return platform_driver_register(&s3c24xx_spidrv);
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}
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static void __exit s3c24xx_spi_exit(void)
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{
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platform_driver_unregister(&s3c24xx_spidrv);
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}
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module_init(s3c24xx_spi_init);
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module_exit(s3c24xx_spi_exit);
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MODULE_DESCRIPTION("S3C24XX SPI Driver");
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MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
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MODULE_LICENSE("GPL");
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