![Oliver Hartkopp](/assets/img/avatar_default.png)
This is a follow up patch to:
f901b6b
can: sja1000: fix define conflict on SH
That patch fixed a define conflict between the SH architecture and the sja1000
driver, by addind a prefix to one macro only. This patch consistently renames
the prefix of the SJA1000 controller registers from "REG_" to "SJA1000_".
Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
374 lines
9.9 KiB
C
374 lines
9.9 KiB
C
/*
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* Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
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* Copyright (C) 2008 Markus Plessing <plessing@ems-wuensche.com>
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* Copyright (C) 2008 Sebastian Haas <haas@ems-wuensche.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the version 2 of the GNU General Public License
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/can/dev.h>
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#include <linux/io.h>
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#include "sja1000.h"
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#define DRV_NAME "ems_pci"
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MODULE_AUTHOR("Sebastian Haas <haas@ems-wuenche.com>");
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MODULE_DESCRIPTION("Socket-CAN driver for EMS CPC-PCI/PCIe/104P CAN cards");
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MODULE_SUPPORTED_DEVICE("EMS CPC-PCI/PCIe/104P CAN card");
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MODULE_LICENSE("GPL v2");
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#define EMS_PCI_V1_MAX_CHAN 2
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#define EMS_PCI_V2_MAX_CHAN 4
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#define EMS_PCI_MAX_CHAN EMS_PCI_V2_MAX_CHAN
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struct ems_pci_card {
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int version;
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int channels;
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struct pci_dev *pci_dev;
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struct net_device *net_dev[EMS_PCI_MAX_CHAN];
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void __iomem *conf_addr;
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void __iomem *base_addr;
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};
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#define EMS_PCI_CAN_CLOCK (16000000 / 2)
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/*
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* Register definitions and descriptions are from LinCAN 0.3.3.
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*
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* PSB4610 PITA-2 bridge control registers
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*/
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#define PITA2_ICR 0x00 /* Interrupt Control Register */
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#define PITA2_ICR_INT0 0x00000002 /* [RC] INT0 Active/Clear */
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#define PITA2_ICR_INT0_EN 0x00020000 /* [RW] Enable INT0 */
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#define PITA2_MISC 0x1c /* Miscellaneous Register */
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#define PITA2_MISC_CONFIG 0x04000000 /* Multiplexed parallel interface */
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/*
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* Register definitions for the PLX 9030
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*/
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#define PLX_ICSR 0x4c /* Interrupt Control/Status register */
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#define PLX_ICSR_LINTI1_ENA 0x0001 /* LINTi1 Enable */
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#define PLX_ICSR_PCIINT_ENA 0x0040 /* PCI Interrupt Enable */
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#define PLX_ICSR_LINTI1_CLR 0x0400 /* Local Edge Triggerable Interrupt Clear */
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#define PLX_ICSR_ENA_CLR (PLX_ICSR_LINTI1_ENA | PLX_ICSR_PCIINT_ENA | \
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PLX_ICSR_LINTI1_CLR)
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/*
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* The board configuration is probably following:
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* RX1 is connected to ground.
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* TX1 is not connected.
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* CLKO is not connected.
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* Setting the OCR register to 0xDA is a good idea.
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* This means normal output mode, push-pull and the correct polarity.
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*/
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#define EMS_PCI_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
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/*
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* In the CDR register, you should set CBP to 1.
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* You will probably also want to set the clock divider value to 7
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* (meaning direct oscillator output) because the second SJA1000 chip
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* is driven by the first one CLKOUT output.
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*/
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#define EMS_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
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#define EMS_PCI_V1_BASE_BAR 1
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#define EMS_PCI_V1_CONF_SIZE 4096 /* size of PITA control area */
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#define EMS_PCI_V2_BASE_BAR 2
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#define EMS_PCI_V2_CONF_SIZE 128 /* size of PLX control area */
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#define EMS_PCI_CAN_BASE_OFFSET 0x400 /* offset where the controllers starts */
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#define EMS_PCI_CAN_CTRL_SIZE 0x200 /* memory size for each controller */
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#define EMS_PCI_BASE_SIZE 4096 /* size of controller area */
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static DEFINE_PCI_DEVICE_TABLE(ems_pci_tbl) = {
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/* CPC-PCI v1 */
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{PCI_VENDOR_ID_SIEMENS, 0x2104, PCI_ANY_ID, PCI_ANY_ID,},
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/* CPC-PCI v2 */
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{PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_PLX, 0x4000},
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/* CPC-104P v2 */
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{PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_PLX, 0x4002},
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{0,}
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};
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MODULE_DEVICE_TABLE(pci, ems_pci_tbl);
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/*
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* Helper to read internal registers from card logic (not CAN)
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*/
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static u8 ems_pci_v1_readb(struct ems_pci_card *card, unsigned int port)
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{
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return readb(card->base_addr + (port * 4));
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}
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static u8 ems_pci_v1_read_reg(const struct sja1000_priv *priv, int port)
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{
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return readb(priv->reg_base + (port * 4));
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}
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static void ems_pci_v1_write_reg(const struct sja1000_priv *priv,
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int port, u8 val)
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{
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writeb(val, priv->reg_base + (port * 4));
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}
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static void ems_pci_v1_post_irq(const struct sja1000_priv *priv)
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{
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struct ems_pci_card *card = (struct ems_pci_card *)priv->priv;
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/* reset int flag of pita */
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writel(PITA2_ICR_INT0_EN | PITA2_ICR_INT0,
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card->conf_addr + PITA2_ICR);
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}
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static u8 ems_pci_v2_read_reg(const struct sja1000_priv *priv, int port)
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{
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return readb(priv->reg_base + port);
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}
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static void ems_pci_v2_write_reg(const struct sja1000_priv *priv,
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int port, u8 val)
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{
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writeb(val, priv->reg_base + port);
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}
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static void ems_pci_v2_post_irq(const struct sja1000_priv *priv)
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{
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struct ems_pci_card *card = (struct ems_pci_card *)priv->priv;
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writel(PLX_ICSR_ENA_CLR, card->conf_addr + PLX_ICSR);
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}
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/*
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* Check if a CAN controller is present at the specified location
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* by trying to set 'em into the PeliCAN mode
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*/
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static inline int ems_pci_check_chan(const struct sja1000_priv *priv)
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{
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unsigned char res;
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/* Make sure SJA1000 is in reset mode */
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priv->write_reg(priv, SJA1000_MOD, 1);
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priv->write_reg(priv, SJA1000_CDR, CDR_PELICAN);
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/* read reset-values */
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res = priv->read_reg(priv, SJA1000_CDR);
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if (res == CDR_PELICAN)
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return 1;
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return 0;
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}
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static void ems_pci_del_card(struct pci_dev *pdev)
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{
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struct ems_pci_card *card = pci_get_drvdata(pdev);
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struct net_device *dev;
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int i = 0;
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for (i = 0; i < card->channels; i++) {
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dev = card->net_dev[i];
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if (!dev)
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continue;
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dev_info(&pdev->dev, "Removing %s.\n", dev->name);
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unregister_sja1000dev(dev);
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free_sja1000dev(dev);
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}
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if (card->base_addr != NULL)
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pci_iounmap(card->pci_dev, card->base_addr);
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if (card->conf_addr != NULL)
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pci_iounmap(card->pci_dev, card->conf_addr);
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kfree(card);
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pci_disable_device(pdev);
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pci_set_drvdata(pdev, NULL);
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}
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static void ems_pci_card_reset(struct ems_pci_card *card)
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{
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/* Request board reset */
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writeb(0, card->base_addr);
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}
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/*
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* Probe PCI device for EMS CAN signature and register each available
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* CAN channel to SJA1000 Socket-CAN subsystem.
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*/
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static int ems_pci_add_card(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct sja1000_priv *priv;
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struct net_device *dev;
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struct ems_pci_card *card;
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int max_chan, conf_size, base_bar;
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int err, i;
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/* Enabling PCI device */
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if (pci_enable_device(pdev) < 0) {
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dev_err(&pdev->dev, "Enabling PCI device failed\n");
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return -ENODEV;
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}
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/* Allocating card structures to hold addresses, ... */
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card = kzalloc(sizeof(struct ems_pci_card), GFP_KERNEL);
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if (card == NULL) {
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pci_disable_device(pdev);
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return -ENOMEM;
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}
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pci_set_drvdata(pdev, card);
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card->pci_dev = pdev;
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card->channels = 0;
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if (pdev->vendor == PCI_VENDOR_ID_PLX) {
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card->version = 2; /* CPC-PCI v2 */
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max_chan = EMS_PCI_V2_MAX_CHAN;
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base_bar = EMS_PCI_V2_BASE_BAR;
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conf_size = EMS_PCI_V2_CONF_SIZE;
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} else {
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card->version = 1; /* CPC-PCI v1 */
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max_chan = EMS_PCI_V1_MAX_CHAN;
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base_bar = EMS_PCI_V1_BASE_BAR;
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conf_size = EMS_PCI_V1_CONF_SIZE;
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}
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/* Remap configuration space and controller memory area */
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card->conf_addr = pci_iomap(pdev, 0, conf_size);
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if (card->conf_addr == NULL) {
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err = -ENOMEM;
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goto failure_cleanup;
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}
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card->base_addr = pci_iomap(pdev, base_bar, EMS_PCI_BASE_SIZE);
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if (card->base_addr == NULL) {
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err = -ENOMEM;
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goto failure_cleanup;
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}
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if (card->version == 1) {
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/* Configure PITA-2 parallel interface (enable MUX) */
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writel(PITA2_MISC_CONFIG, card->conf_addr + PITA2_MISC);
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/* Check for unique EMS CAN signature */
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if (ems_pci_v1_readb(card, 0) != 0x55 ||
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ems_pci_v1_readb(card, 1) != 0xAA ||
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ems_pci_v1_readb(card, 2) != 0x01 ||
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ems_pci_v1_readb(card, 3) != 0xCB ||
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ems_pci_v1_readb(card, 4) != 0x11) {
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dev_err(&pdev->dev,
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"Not EMS Dr. Thomas Wuensche interface\n");
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err = -ENODEV;
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goto failure_cleanup;
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}
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}
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ems_pci_card_reset(card);
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/* Detect available channels */
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for (i = 0; i < max_chan; i++) {
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dev = alloc_sja1000dev(0);
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if (dev == NULL) {
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err = -ENOMEM;
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goto failure_cleanup;
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}
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card->net_dev[i] = dev;
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priv = netdev_priv(dev);
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priv->priv = card;
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priv->irq_flags = IRQF_SHARED;
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dev->irq = pdev->irq;
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priv->reg_base = card->base_addr + EMS_PCI_CAN_BASE_OFFSET
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+ (i * EMS_PCI_CAN_CTRL_SIZE);
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if (card->version == 1) {
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priv->read_reg = ems_pci_v1_read_reg;
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priv->write_reg = ems_pci_v1_write_reg;
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priv->post_irq = ems_pci_v1_post_irq;
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} else {
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priv->read_reg = ems_pci_v2_read_reg;
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priv->write_reg = ems_pci_v2_write_reg;
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priv->post_irq = ems_pci_v2_post_irq;
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}
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/* Check if channel is present */
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if (ems_pci_check_chan(priv)) {
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priv->can.clock.freq = EMS_PCI_CAN_CLOCK;
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priv->ocr = EMS_PCI_OCR;
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priv->cdr = EMS_PCI_CDR;
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SET_NETDEV_DEV(dev, &pdev->dev);
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if (card->version == 1)
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/* reset int flag of pita */
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writel(PITA2_ICR_INT0_EN | PITA2_ICR_INT0,
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card->conf_addr + PITA2_ICR);
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else
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/* enable IRQ in PLX 9030 */
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writel(PLX_ICSR_ENA_CLR,
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card->conf_addr + PLX_ICSR);
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/* Register SJA1000 device */
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err = register_sja1000dev(dev);
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if (err) {
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dev_err(&pdev->dev, "Registering device failed "
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"(err=%d)\n", err);
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free_sja1000dev(dev);
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goto failure_cleanup;
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}
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card->channels++;
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dev_info(&pdev->dev, "Channel #%d at 0x%p, irq %d\n",
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i + 1, priv->reg_base, dev->irq);
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} else {
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free_sja1000dev(dev);
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}
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}
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return 0;
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failure_cleanup:
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dev_err(&pdev->dev, "Error: %d. Cleaning Up.\n", err);
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ems_pci_del_card(pdev);
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return err;
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}
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static struct pci_driver ems_pci_driver = {
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.name = DRV_NAME,
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.id_table = ems_pci_tbl,
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.probe = ems_pci_add_card,
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.remove = ems_pci_del_card,
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};
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module_pci_driver(ems_pci_driver);
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