![Tony Lindgren](/assets/img/avatar_default.png)
At least on n900 we have phy-twl4030-usb only generating cable interrupts, and then have a separate USB PHY. In order for musb to know the real cable status, we need to clear any cached state until musb is ready. Otherwise the cable status interrupts will get just ignored if the status does not change from the initial state. To do this, let's add a return value to musb_mailbox(), and reset cached linkstat to MUSB_UNKNOWN on error. Sorry to cause a bit of churn here, I should have added that already last time patching musb_mailbox(). Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
172 lines
4.5 KiB
C
172 lines
4.5 KiB
C
/*
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* This is used to for host and peripheral modes of the driver for
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* Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC.
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*
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* Board initialization should put one of these into dev->platform_data,
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* probably on some platform_device named "musb-hdrc". It encapsulates
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* key configuration differences between boards.
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*/
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#ifndef __LINUX_USB_MUSB_H
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#define __LINUX_USB_MUSB_H
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/* The USB role is defined by the connector used on the board, so long as
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* standards are being followed. (Developer boards sometimes won't.)
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*/
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enum musb_mode {
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MUSB_UNDEFINED = 0,
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MUSB_HOST, /* A or Mini-A connector */
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MUSB_PERIPHERAL, /* B or Mini-B connector */
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MUSB_OTG /* Mini-AB connector */
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};
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struct clk;
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enum musb_fifo_style {
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FIFO_RXTX,
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FIFO_TX,
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FIFO_RX
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} __attribute__ ((packed));
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enum musb_buf_mode {
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BUF_SINGLE,
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BUF_DOUBLE
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} __attribute__ ((packed));
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struct musb_fifo_cfg {
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u8 hw_ep_num;
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enum musb_fifo_style style;
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enum musb_buf_mode mode;
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u16 maxpacket;
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};
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#define MUSB_EP_FIFO(ep, st, m, pkt) \
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{ \
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.hw_ep_num = ep, \
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.style = st, \
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.mode = m, \
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.maxpacket = pkt, \
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}
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#define MUSB_EP_FIFO_SINGLE(ep, st, pkt) \
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MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt)
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#define MUSB_EP_FIFO_DOUBLE(ep, st, pkt) \
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MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt)
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struct musb_hdrc_eps_bits {
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const char name[16];
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u8 bits;
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};
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struct musb_hdrc_config {
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struct musb_fifo_cfg *fifo_cfg; /* board fifo configuration */
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unsigned fifo_cfg_size; /* size of the fifo configuration */
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/* MUSB configuration-specific details */
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unsigned multipoint:1; /* multipoint device */
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unsigned dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */
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unsigned soft_con:1 __deprecated; /* soft connect required */
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unsigned utm_16:1 __deprecated; /* utm data witdh is 16 bits */
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unsigned big_endian:1; /* true if CPU uses big-endian */
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unsigned mult_bulk_tx:1; /* Tx ep required for multbulk pkts */
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unsigned mult_bulk_rx:1; /* Rx ep required for multbulk pkts */
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unsigned high_iso_tx:1; /* Tx ep required for HB iso */
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unsigned high_iso_rx:1; /* Rx ep required for HD iso */
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unsigned dma:1 __deprecated; /* supports DMA */
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unsigned vendor_req:1 __deprecated; /* vendor registers required */
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/* need to explicitly de-assert the port reset after resume? */
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unsigned host_port_deassert_reset_at_resume:1;
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u8 num_eps; /* number of endpoints _with_ ep0 */
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u8 dma_channels __deprecated; /* number of dma channels */
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u8 dyn_fifo_size; /* dynamic size in bytes */
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u8 vendor_ctrl __deprecated; /* vendor control reg width */
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u8 vendor_stat __deprecated; /* vendor status reg witdh */
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u8 dma_req_chan __deprecated; /* bitmask for required dma channels */
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u8 ram_bits; /* ram address size */
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struct musb_hdrc_eps_bits *eps_bits __deprecated;
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#ifdef CONFIG_BLACKFIN
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/* A GPIO controlling VRSEL in Blackfin */
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unsigned int gpio_vrsel;
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unsigned int gpio_vrsel_active;
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/* musb CLKIN in Blackfin in MHZ */
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unsigned char clkin;
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#endif
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u32 maximum_speed;
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};
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struct musb_hdrc_platform_data {
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/* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */
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u8 mode;
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/* for clk_get() */
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const char *clock;
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/* (HOST or OTG) switch VBUS on/off */
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int (*set_vbus)(struct device *dev, int is_on);
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/* (HOST or OTG) mA/2 power supplied on (default = 8mA) */
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u8 power;
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/* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */
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u8 min_power;
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/* (HOST or OTG) msec/2 after VBUS on till power good */
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u8 potpgt;
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/* (HOST or OTG) program PHY for external Vbus */
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unsigned extvbus:1;
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/* Power the device on or off */
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int (*set_power)(int state);
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/* MUSB configuration-specific details */
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const struct musb_hdrc_config *config;
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/* Architecture specific board data */
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void *board_data;
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/* Platform specific struct musb_ops pointer */
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const void *platform_ops;
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};
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enum musb_vbus_id_status {
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MUSB_UNKNOWN = 0,
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MUSB_ID_GROUND,
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MUSB_ID_FLOAT,
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MUSB_VBUS_VALID,
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MUSB_VBUS_OFF,
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};
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#if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
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int musb_mailbox(enum musb_vbus_id_status status);
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#else
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static inline int musb_mailbox(enum musb_vbus_id_status status)
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{
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return 0;
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}
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#endif
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/* TUSB 6010 support */
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#define TUSB6010_OSCCLK_60 16667 /* psec/clk @ 60.0 MHz */
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#define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */
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#define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */
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#ifdef CONFIG_ARCH_OMAP2
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extern int __init tusb6010_setup_interface(
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struct musb_hdrc_platform_data *data,
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unsigned ps_refclk, unsigned waitpin,
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unsigned async_cs, unsigned sync_cs,
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unsigned irq, unsigned dmachan);
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extern int tusb6010_platform_retime(unsigned is_refclk);
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#endif /* OMAP2 */
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#endif /* __LINUX_USB_MUSB_H */
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