aeec56e331
The basic GPIO controllers may be found in various on-board FPGA and ASIC solutions that are used to control board's switches, LEDs, chip-selects, Ethernet/USB PHY power, etc. These controllers may not provide any means of pin setup (in/out/open drain). The driver supports: - 8/16/32/64 bits registers; - GPIO controllers with clear/set registers; - GPIO controllers with a single "data" register; - Big endian bits/GPIOs ordering (mostly used on PowerPC). Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: David Brownell <david-b@pacbell.net> Cc: Samuel Ortiz <sameo@linux.intel.com>, Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
21 lines
547 B
C
21 lines
547 B
C
/*
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* Basic memory-mapped GPIO controllers.
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*
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* Copyright 2008 MontaVista Software, Inc.
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* Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __BASIC_MMIO_GPIO_H
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#define __BASIC_MMIO_GPIO_H
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struct bgpio_pdata {
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int base;
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};
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#endif /* __BASIC_MMIO_GPIO_H */
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