812283cd54
Add a driver for the Xilinx Clocking Wizard soft IP. The clocking wizard provides an AXI interface to dynamically reconfigure the clocking resources of Xilinx FPGAs. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 lines
443 B
Plaintext
13 lines
443 B
Plaintext
TODO:
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- support for fractional multiplier
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- support for fractional divider (output 0 only)
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- support for set_rate() operations (may benefit from Stephen Boyd's
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refactoring of the clk primitives: https://lkml.org/lkml/2014/9/5/766)
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- review arithmetic
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- overflow after multiplication?
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- maximize accuracy before divisions
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Patches to:
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Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Sören Brinkmann <soren.brinkmann@xilinx.com>
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