d7ef767173
On some Silvermont-Core/Baytrail-SOC systems, C1E latency is higher than original specifications. Although C1E is still enumerated in CPUID.MWAIT.EDX, we delete the state from intel_idle to avoid latency impact. Under some conditions, the latency of the C6N-BYT and C6S-BYT states may exceed the specified values of 40 and 140 usec, respectively. Increase those values to 300 and 500 usec; to assure that the hardware does not violate constraints that may be set by the Linux PM_QOS sub-system. Also increase the C7-BYT target residency to 4.0 ms from 1.5 ms. Signed-off-by: Len Brown <len.brown@intel.com> Cc: Kumar P Mahesh <mahesh.kumar.p@intel.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: <stable@vger.kernel.org> |
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| .. | ||
| i7300_idle.c | ||
| intel_idle.c | ||
| Kconfig | ||
| Makefile | ||