Pawel Moll d927daf5c8 ARM: vexpress: Check master site in daughterboard's sysctl operations ... With recent enough motherboard firmware, core tile can be fitted in either of the two daughterboard sites. The non-DT tile code for V2P-CA9 did not check that when configuring DVI output nor setting CLCD pixel clock. Fixed now, providing "get master site" API in motherboard's code. Signed-off-by: Pawel Moll <pawel.moll@arm.com>		2012-07-12 16:16:56 +01:00
..
include/mach	ARM: vexpress: Check master site in daughterboard's sysctl operations	2012-07-12 16:16:56 +01:00
core.h	Merge branch 'tegra/cleanups' into next/timer	2012-03-21 14:27:34 +00:00
ct-ca9x4.c	ARM: vexpress: Check master site in daughterboard's sysctl operations	2012-07-12 16:16:56 +01:00
hotplug.c	ARM: move CP15 definitions to separate header file	2012-03-28 18:30:01 +01:00
Kconfig	ARM: vexpress: remove automatic errata workaround selection	2012-07-12 16:16:56 +01:00
Makefile
Makefile.boot	ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)	2012-02-24 09:18:21 +00:00
platsmp.c	ARM: vexpress: Use FDT data in platform SMP calls	2012-02-24 09:18:14 +00:00
v2m.c	ARM: vexpress: Check master site in daughterboard's sysctl operations	2012-07-12 16:16:56 +01:00