![Johannes Berg](/assets/img/avatar_default.png)
This allows "hotplugging" of CPUs on G5 machines. CPUs that are disabled are put into an idle loop with the decrementer frequency set to minimum. To wake them up again we kick them just like when bringing them up. To stop those CPUs from messing with any global state we stop them from entering the timer interrupt. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
752 lines
17 KiB
C
752 lines
17 KiB
C
/*
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* Powermac setup and early boot code plus other random bits.
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*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Adapted for Power Macintosh by Paul Mackerras
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* Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
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*
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* Derived from "arch/alpha/kernel/setup.c"
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* Copyright (C) 1995 Linus Torvalds
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*
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* Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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/*
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* bootup setup stuff..
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/tty.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/major.h>
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#include <linux/initrd.h>
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#include <linux/vt_kern.h>
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#include <linux/console.h>
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#include <linux/pci.h>
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#include <linux/adb.h>
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#include <linux/cuda.h>
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#include <linux/pmu.h>
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#include <linux/irq.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/bitops.h>
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#include <linux/suspend.h>
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#include <asm/reg.h>
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#include <asm/sections.h>
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#include <asm/prom.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/io.h>
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#include <asm/kexec.h>
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#include <asm/pci-bridge.h>
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#include <asm/ohare.h>
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#include <asm/mediabay.h>
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#include <asm/machdep.h>
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#include <asm/dma.h>
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#include <asm/cputable.h>
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#include <asm/btext.h>
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#include <asm/pmac_feature.h>
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#include <asm/time.h>
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#include <asm/of_device.h>
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#include <asm/of_platform.h>
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#include <asm/mmu_context.h>
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#include <asm/iommu.h>
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#include <asm/smu.h>
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#include <asm/pmc.h>
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#include <asm/lmb.h>
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#include <asm/udbg.h>
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#include "pmac.h"
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#undef SHOW_GATWICK_IRQS
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int ppc_override_l2cr = 0;
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int ppc_override_l2cr_value;
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int has_l2cache = 0;
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int pmac_newworld;
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static int current_root_goodness = -1;
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extern struct machdep_calls pmac_md;
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#define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
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#ifdef CONFIG_PPC64
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#include <asm/udbg.h>
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int sccdbg;
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#endif
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extern void zs_kgdb_hook(int tty_num);
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sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
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EXPORT_SYMBOL(sys_ctrler);
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#ifdef CONFIG_PMAC_SMU
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unsigned long smu_cmdbuf_abs;
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EXPORT_SYMBOL(smu_cmdbuf_abs);
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#endif
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#ifdef CONFIG_SMP
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extern struct smp_ops_t psurge_smp_ops;
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extern struct smp_ops_t core99_smp_ops;
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#endif /* CONFIG_SMP */
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static void pmac_show_cpuinfo(struct seq_file *m)
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{
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struct device_node *np;
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const char *pp;
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int plen;
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int mbmodel;
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unsigned int mbflags;
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char* mbname;
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mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
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PMAC_MB_INFO_MODEL, 0);
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mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
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PMAC_MB_INFO_FLAGS, 0);
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if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
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(long) &mbname) != 0)
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mbname = "Unknown";
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/* find motherboard type */
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seq_printf(m, "machine\t\t: ");
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np = of_find_node_by_path("/");
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if (np != NULL) {
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pp = of_get_property(np, "model", NULL);
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if (pp != NULL)
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seq_printf(m, "%s\n", pp);
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else
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seq_printf(m, "PowerMac\n");
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pp = of_get_property(np, "compatible", &plen);
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if (pp != NULL) {
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seq_printf(m, "motherboard\t:");
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while (plen > 0) {
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int l = strlen(pp) + 1;
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seq_printf(m, " %s", pp);
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plen -= l;
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pp += l;
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}
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seq_printf(m, "\n");
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}
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of_node_put(np);
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} else
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seq_printf(m, "PowerMac\n");
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/* print parsed model */
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seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
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seq_printf(m, "pmac flags\t: %08x\n", mbflags);
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/* find l2 cache info */
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np = of_find_node_by_name(NULL, "l2-cache");
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if (np == NULL)
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np = of_find_node_by_type(NULL, "cache");
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if (np != NULL) {
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const unsigned int *ic =
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of_get_property(np, "i-cache-size", NULL);
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const unsigned int *dc =
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of_get_property(np, "d-cache-size", NULL);
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seq_printf(m, "L2 cache\t:");
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has_l2cache = 1;
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if (of_get_property(np, "cache-unified", NULL) != 0 && dc) {
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seq_printf(m, " %dK unified", *dc / 1024);
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} else {
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if (ic)
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seq_printf(m, " %dK instruction", *ic / 1024);
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if (dc)
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seq_printf(m, "%s %dK data",
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(ic? " +": ""), *dc / 1024);
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}
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pp = of_get_property(np, "ram-type", NULL);
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if (pp)
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seq_printf(m, " %s", pp);
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seq_printf(m, "\n");
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of_node_put(np);
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}
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/* Indicate newworld/oldworld */
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seq_printf(m, "pmac-generation\t: %s\n",
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pmac_newworld ? "NewWorld" : "OldWorld");
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}
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#ifndef CONFIG_ADB_CUDA
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int find_via_cuda(void)
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{
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struct device_node *dn = of_find_node_by_name(NULL, "via-cuda");
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if (!dn)
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return 0;
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of_node_put(dn);
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printk("WARNING ! Your machine is CUDA-based but your kernel\n");
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printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n");
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return 0;
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}
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#endif
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#ifndef CONFIG_ADB_PMU
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int find_via_pmu(void)
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{
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struct device_node *dn = of_find_node_by_name(NULL, "via-pmu");
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if (!dn)
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return 0;
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of_node_put(dn);
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printk("WARNING ! Your machine is PMU-based but your kernel\n");
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printk(" wasn't compiled with CONFIG_ADB_PMU option !\n");
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return 0;
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}
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#endif
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#ifndef CONFIG_PMAC_SMU
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int smu_init(void)
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{
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/* should check and warn if SMU is present */
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return 0;
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}
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#endif
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#ifdef CONFIG_PPC32
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static volatile u32 *sysctrl_regs;
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static void __init ohare_init(void)
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{
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struct device_node *dn;
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/* this area has the CPU identification register
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and some registers used by smp boards */
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sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);
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/*
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* Turn on the L2 cache.
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* We assume that we have a PSX memory controller iff
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* we have an ohare I/O controller.
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*/
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dn = of_find_node_by_name(NULL, "ohare");
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if (dn) {
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of_node_put(dn);
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if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
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if (sysctrl_regs[4] & 0x10)
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sysctrl_regs[4] |= 0x04000020;
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else
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sysctrl_regs[4] |= 0x04000000;
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if(has_l2cache)
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printk(KERN_INFO "Level 2 cache enabled\n");
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}
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}
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}
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static void __init l2cr_init(void)
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{
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/* Checks "l2cr-value" property in the registry */
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if (cpu_has_feature(CPU_FTR_L2CR)) {
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struct device_node *np = of_find_node_by_name(NULL, "cpus");
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if (np == 0)
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np = of_find_node_by_type(NULL, "cpu");
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if (np != 0) {
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const unsigned int *l2cr =
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of_get_property(np, "l2cr-value", NULL);
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if (l2cr != 0) {
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ppc_override_l2cr = 1;
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ppc_override_l2cr_value = *l2cr;
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_set_L2CR(0);
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_set_L2CR(ppc_override_l2cr_value);
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}
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of_node_put(np);
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}
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}
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if (ppc_override_l2cr)
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printk(KERN_INFO "L2CR overridden (0x%x), "
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"backside cache is %s\n",
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ppc_override_l2cr_value,
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(ppc_override_l2cr_value & 0x80000000)
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? "enabled" : "disabled");
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}
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#endif
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static void __init pmac_setup_arch(void)
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{
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struct device_node *cpu, *ic;
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const int *fp;
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unsigned long pvr;
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pvr = PVR_VER(mfspr(SPRN_PVR));
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/* Set loops_per_jiffy to a half-way reasonable value,
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for use until calibrate_delay gets called. */
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loops_per_jiffy = 50000000 / HZ;
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cpu = of_find_node_by_type(NULL, "cpu");
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if (cpu != NULL) {
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fp = of_get_property(cpu, "clock-frequency", NULL);
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if (fp != NULL) {
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if (pvr >= 0x30 && pvr < 0x80)
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/* PPC970 etc. */
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loops_per_jiffy = *fp / (3 * HZ);
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else if (pvr == 4 || pvr >= 8)
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/* 604, G3, G4 etc. */
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loops_per_jiffy = *fp / HZ;
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else
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/* 601, 603, etc. */
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loops_per_jiffy = *fp / (2 * HZ);
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}
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of_node_put(cpu);
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}
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/* See if newworld or oldworld */
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for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
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if (of_get_property(ic, "interrupt-controller", NULL))
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break;
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if (ic) {
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pmac_newworld = 1;
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of_node_put(ic);
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}
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/* Lookup PCI hosts */
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pmac_pci_init();
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#ifdef CONFIG_PPC32
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ohare_init();
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l2cr_init();
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_KGDB
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zs_kgdb_hook(0);
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#endif
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find_via_cuda();
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find_via_pmu();
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smu_init();
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#if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64)
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pmac_nvram_init();
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#endif
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#ifdef CONFIG_PPC32
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#ifdef CONFIG_BLK_DEV_INITRD
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if (initrd_start)
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ROOT_DEV = Root_RAM0;
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else
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#endif
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ROOT_DEV = DEFAULT_ROOT_DEVICE;
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#endif
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#ifdef CONFIG_SMP
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/* Check for Core99 */
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ic = of_find_node_by_name(NULL, "uni-n");
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if (!ic)
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ic = of_find_node_by_name(NULL, "u3");
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if (!ic)
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ic = of_find_node_by_name(NULL, "u4");
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if (ic) {
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of_node_put(ic);
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smp_ops = &core99_smp_ops;
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}
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#ifdef CONFIG_PPC32
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else
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smp_ops = &psurge_smp_ops;
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#endif
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#endif /* CONFIG_SMP */
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#ifdef CONFIG_ADB
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if (strstr(cmd_line, "adb_sync")) {
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extern int __adb_probe_sync;
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__adb_probe_sync = 1;
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}
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#endif /* CONFIG_ADB */
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}
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char *bootpath;
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char *bootdevice;
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void *boot_host;
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int boot_target;
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int boot_part;
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static dev_t boot_dev;
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#ifdef CONFIG_SCSI
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void __init note_scsi_host(struct device_node *node, void *host)
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{
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int l;
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char *p;
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l = strlen(node->full_name);
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if (bootpath != NULL && bootdevice != NULL
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&& strncmp(node->full_name, bootdevice, l) == 0
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&& (bootdevice[l] == '/' || bootdevice[l] == 0)) {
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boot_host = host;
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/*
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* There's a bug in OF 1.0.5. (Why am I not surprised.)
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* If you pass a path like scsi/sd@1:0 to canon, it returns
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* something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0
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* That is, the scsi target number doesn't get preserved.
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* So we pick the target number out of bootpath and use that.
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*/
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p = strstr(bootpath, "/sd@");
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if (p != NULL) {
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p += 4;
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boot_target = simple_strtoul(p, NULL, 10);
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p = strchr(p, ':');
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if (p != NULL)
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boot_part = simple_strtoul(p + 1, NULL, 10);
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}
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}
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}
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EXPORT_SYMBOL(note_scsi_host);
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#endif
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#if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
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static dev_t __init find_ide_boot(void)
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{
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char *p;
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int n;
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dev_t __init pmac_find_ide_boot(char *bootdevice, int n);
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if (bootdevice == NULL)
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return 0;
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p = strrchr(bootdevice, '/');
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if (p == NULL)
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return 0;
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n = p - bootdevice;
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return pmac_find_ide_boot(bootdevice, n);
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}
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#endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */
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static void __init find_boot_device(void)
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{
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#if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
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boot_dev = find_ide_boot();
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#endif
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}
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static int initializing = 1;
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static int pmac_late_init(void)
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{
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initializing = 0;
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/* this is udbg (which is __init) and we can later use it during
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* cpu hotplug (in smp_core99_kick_cpu) */
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ppc_md.progress = NULL;
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return 0;
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}
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late_initcall(pmac_late_init);
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/* can't be __init - can be called whenever a disk is first accessed */
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void note_bootable_part(dev_t dev, int part, int goodness)
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{
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static int found_boot = 0;
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char *p;
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if (!initializing)
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return;
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if ((goodness <= current_root_goodness) &&
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ROOT_DEV != DEFAULT_ROOT_DEVICE)
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return;
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p = strstr(boot_command_line, "root=");
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if (p != NULL && (p == boot_command_line || p[-1] == ' '))
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return;
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if (!found_boot) {
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find_boot_device();
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found_boot = 1;
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}
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if (!boot_dev || dev == boot_dev) {
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ROOT_DEV = dev + part;
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boot_dev = 0;
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current_root_goodness = goodness;
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}
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}
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#ifdef CONFIG_ADB_CUDA
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static void cuda_restart(void)
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{
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struct adb_request req;
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cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
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for (;;)
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cuda_poll();
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}
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static void cuda_shutdown(void)
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{
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struct adb_request req;
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cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
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for (;;)
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cuda_poll();
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}
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#else
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#define cuda_restart()
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#define cuda_shutdown()
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#endif
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#ifndef CONFIG_ADB_PMU
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#define pmu_restart()
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#define pmu_shutdown()
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#endif
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#ifndef CONFIG_PMAC_SMU
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|
#define smu_restart()
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|
#define smu_shutdown()
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|
#endif
|
|
|
|
static void pmac_restart(char *cmd)
|
|
{
|
|
switch (sys_ctrler) {
|
|
case SYS_CTRLER_CUDA:
|
|
cuda_restart();
|
|
break;
|
|
case SYS_CTRLER_PMU:
|
|
pmu_restart();
|
|
break;
|
|
case SYS_CTRLER_SMU:
|
|
smu_restart();
|
|
break;
|
|
default: ;
|
|
}
|
|
}
|
|
|
|
static void pmac_power_off(void)
|
|
{
|
|
switch (sys_ctrler) {
|
|
case SYS_CTRLER_CUDA:
|
|
cuda_shutdown();
|
|
break;
|
|
case SYS_CTRLER_PMU:
|
|
pmu_shutdown();
|
|
break;
|
|
case SYS_CTRLER_SMU:
|
|
smu_shutdown();
|
|
break;
|
|
default: ;
|
|
}
|
|
}
|
|
|
|
static void
|
|
pmac_halt(void)
|
|
{
|
|
pmac_power_off();
|
|
}
|
|
|
|
/*
|
|
* Early initialization.
|
|
*/
|
|
static void __init pmac_init_early(void)
|
|
{
|
|
/* Enable early btext debug if requested */
|
|
if (strstr(cmd_line, "btextdbg")) {
|
|
udbg_adb_init_early();
|
|
register_early_udbg_console();
|
|
}
|
|
|
|
/* Probe motherboard chipset */
|
|
pmac_feature_init();
|
|
|
|
/* Initialize debug stuff */
|
|
udbg_scc_init(!!strstr(cmd_line, "sccdbg"));
|
|
udbg_adb_init(!!strstr(cmd_line, "btextdbg"));
|
|
|
|
#ifdef CONFIG_PPC64
|
|
iommu_init_early_dart();
|
|
#endif
|
|
}
|
|
|
|
static int __init pmac_declare_of_platform_devices(void)
|
|
{
|
|
struct device_node *np;
|
|
|
|
if (machine_is(chrp))
|
|
return -1;
|
|
|
|
if (!machine_is(powermac))
|
|
return 0;
|
|
|
|
np = of_find_node_by_name(NULL, "valkyrie");
|
|
if (np)
|
|
of_platform_device_create(np, "valkyrie", NULL);
|
|
np = of_find_node_by_name(NULL, "platinum");
|
|
if (np)
|
|
of_platform_device_create(np, "platinum", NULL);
|
|
np = of_find_node_by_type(NULL, "smu");
|
|
if (np) {
|
|
of_platform_device_create(np, "smu", NULL);
|
|
of_node_put(np);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
device_initcall(pmac_declare_of_platform_devices);
|
|
|
|
/*
|
|
* Called very early, MMU is off, device-tree isn't unflattened
|
|
*/
|
|
static int __init pmac_probe(void)
|
|
{
|
|
unsigned long root = of_get_flat_dt_root();
|
|
|
|
if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
|
|
!of_flat_dt_is_compatible(root, "MacRISC"))
|
|
return 0;
|
|
|
|
#ifdef CONFIG_PPC64
|
|
/*
|
|
* On U3, the DART (iommu) must be allocated now since it
|
|
* has an impact on htab_initialize (due to the large page it
|
|
* occupies having to be broken up so the DART itself is not
|
|
* part of the cacheable linar mapping
|
|
*/
|
|
alloc_dart_table();
|
|
|
|
hpte_init_native();
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC32
|
|
/* isa_io_base gets set in pmac_pci_init */
|
|
ISA_DMA_THRESHOLD = ~0L;
|
|
DMA_MODE_READ = 1;
|
|
DMA_MODE_WRITE = 2;
|
|
|
|
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
|
|
#ifdef CONFIG_BLK_DEV_IDE_PMAC
|
|
ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports;
|
|
ppc_ide_md.default_io_base = pmac_ide_get_base;
|
|
#endif /* CONFIG_BLK_DEV_IDE_PMAC */
|
|
#endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */
|
|
|
|
#endif /* CONFIG_PPC32 */
|
|
|
|
#ifdef CONFIG_PMAC_SMU
|
|
/*
|
|
* SMU based G5s need some memory below 2Gb, at least the current
|
|
* driver needs that. We have to allocate it now. We allocate 4k
|
|
* (1 small page) for now.
|
|
*/
|
|
smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
|
|
#endif /* CONFIG_PMAC_SMU */
|
|
|
|
return 1;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC64
|
|
/* Move that to pci.c */
|
|
static int pmac_pci_probe_mode(struct pci_bus *bus)
|
|
{
|
|
struct device_node *node = bus->sysdata;
|
|
|
|
/* We need to use normal PCI probing for the AGP bus,
|
|
* since the device for the AGP bridge isn't in the tree.
|
|
*/
|
|
if (bus->self == NULL && (device_is_compatible(node, "u3-agp") ||
|
|
device_is_compatible(node, "u4-pcie")))
|
|
return PCI_PROBE_NORMAL;
|
|
return PCI_PROBE_DEVTREE;
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
/* access per cpu vars from generic smp.c */
|
|
DECLARE_PER_CPU(int, cpu_state);
|
|
|
|
static void pmac_cpu_die(void)
|
|
{
|
|
/*
|
|
* turn off as much as possible, we'll be
|
|
* kicked out as this will only be invoked
|
|
* on core99 platforms for now ...
|
|
*/
|
|
|
|
printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
|
|
__get_cpu_var(cpu_state) = CPU_DEAD;
|
|
smp_wmb();
|
|
|
|
/*
|
|
* during the path that leads here preemption is disabled,
|
|
* reenable it now so that when coming up preempt count is
|
|
* zero correctly
|
|
*/
|
|
preempt_enable();
|
|
|
|
/*
|
|
* hard-disable interrupts for the non-NAP case, the NAP code
|
|
* needs to re-enable interrupts (but soft-disables them)
|
|
*/
|
|
hard_irq_disable();
|
|
|
|
while (1) {
|
|
/* let's not take timer interrupts too often ... */
|
|
set_dec(0x7fffffff);
|
|
|
|
/* should always be true at this point */
|
|
if (cpu_has_feature(CPU_FTR_CAN_NAP))
|
|
power4_cpu_offline_powersave();
|
|
else {
|
|
HMT_low();
|
|
HMT_very_low();
|
|
}
|
|
}
|
|
}
|
|
#endif /* CONFIG_HOTPLUG_CPU */
|
|
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
define_machine(powermac) {
|
|
.name = "PowerMac",
|
|
.probe = pmac_probe,
|
|
.setup_arch = pmac_setup_arch,
|
|
.init_early = pmac_init_early,
|
|
.show_cpuinfo = pmac_show_cpuinfo,
|
|
.init_IRQ = pmac_pic_init,
|
|
.get_irq = NULL, /* changed later */
|
|
.pci_irq_fixup = pmac_pci_irq_fixup,
|
|
.restart = pmac_restart,
|
|
.power_off = pmac_power_off,
|
|
.halt = pmac_halt,
|
|
.time_init = pmac_time_init,
|
|
.get_boot_time = pmac_get_boot_time,
|
|
.set_rtc_time = pmac_set_rtc_time,
|
|
.get_rtc_time = pmac_get_rtc_time,
|
|
.calibrate_decr = pmac_calibrate_decr,
|
|
.feature_call = pmac_do_feature_call,
|
|
.progress = udbg_progress,
|
|
#ifdef CONFIG_PPC64
|
|
.pci_probe_mode = pmac_pci_probe_mode,
|
|
.power_save = power4_idle,
|
|
.enable_pmcs = power4_enable_pmcs,
|
|
#ifdef CONFIG_KEXEC
|
|
.machine_kexec = default_machine_kexec,
|
|
.machine_kexec_prepare = default_machine_kexec_prepare,
|
|
.machine_crash_shutdown = default_machine_crash_shutdown,
|
|
#endif
|
|
#endif /* CONFIG_PPC64 */
|
|
#ifdef CONFIG_PPC32
|
|
.pcibios_enable_device_hook = pmac_pci_enable_device_hook,
|
|
.pcibios_after_init = pmac_pcibios_after_init,
|
|
.phys_mem_access_prot = pci_phys_mem_access_prot,
|
|
#endif
|
|
#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
|
|
.cpu_die = pmac_cpu_die,
|
|
#endif
|
|
};
|