501f2499b8
This fix prevents re-disabling and enabling of a previously disabled interrupt. On an SMP system with irq balancing enabled; If an interrupt is disabled from within its own interrupt context with disable_irq_nosync and is also earmarked for processor migration, the interrupt is blindly moved to the other processor and enabled without regard for its current "enabled" state. If there is an interrupt pending, it will unexpectedly invoke the irq handler on the new irq owning processor (even though the irq was previously disabled) The more intuitive fix would be to invoke disable_irq_nosync and enable_irq, but since we already have the desc->lock from __do_IRQ, we cannot call them directly. Instead we can use the same logic to disable and enable found in disable_irq_nosync and enable_irq, with regards to the desc->depth. This now prevents a disabled interrupt from being re-disabled, and more importantly prevents a disabled interrupt from being incorrectly enabled on a different processor. Signed-off-by: Bryan Holty <lgeek@frontiernet.net> Cc: Andi Kleen <ak@muc.de> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
66 lines
1.4 KiB
C
66 lines
1.4 KiB
C
#include <linux/irq.h>
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#if defined(CONFIG_GENERIC_PENDING_IRQ)
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void set_pending_irq(unsigned int irq, cpumask_t mask)
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{
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irq_desc_t *desc = irq_desc + irq;
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unsigned long flags;
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spin_lock_irqsave(&desc->lock, flags);
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desc->move_irq = 1;
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pending_irq_cpumask[irq] = mask;
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spin_unlock_irqrestore(&desc->lock, flags);
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}
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void move_native_irq(int irq)
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{
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cpumask_t tmp;
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irq_desc_t *desc = irq_descp(irq);
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if (likely(!desc->move_irq))
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return;
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/*
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* Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
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*/
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if (CHECK_IRQ_PER_CPU(desc->status)) {
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WARN_ON(1);
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return;
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}
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desc->move_irq = 0;
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if (likely(cpus_empty(pending_irq_cpumask[irq])))
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return;
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if (!desc->handler->set_affinity)
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return;
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assert_spin_locked(&desc->lock);
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cpus_and(tmp, pending_irq_cpumask[irq], cpu_online_map);
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/*
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* If there was a valid mask to work with, please
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* do the disable, re-program, enable sequence.
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* This is *not* particularly important for level triggered
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* but in a edge trigger case, we might be setting rte
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* when an active trigger is comming in. This could
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* cause some ioapics to mal-function.
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* Being paranoid i guess!
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*/
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if (unlikely(!cpus_empty(tmp))) {
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if (likely(!(desc->status & IRQ_DISABLED)))
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desc->handler->disable(irq);
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desc->handler->set_affinity(irq,tmp);
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if (likely(!(desc->status & IRQ_DISABLED)))
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desc->handler->enable(irq);
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}
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cpus_clear(pending_irq_cpumask[irq]);
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}
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#endif
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