612a9aab56
Pull drm merge (part 1) from Dave Airlie:
"So first of all my tree and uapi stuff has a conflict mess, its my
fault as the nouveau stuff didn't hit -next as were trying to rebase
regressions out of it before we merged.
Highlights:
- SH mobile modesetting driver and associated helpers
- some DRM core documentation
- i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write
combined pte writing, ilk rc6 support,
- nouveau: major driver rework into a hw core driver, makes features
like SLI a lot saner to implement,
- psb: add eDP/DP support for Cedarview
- radeon: 2 layer page tables, async VM pte updates, better PLL
selection for > 2 screens, better ACPI interactions
The rest is general grab bag of fixes.
So why part 1? well I have the exynos pull req which came in a bit
late but was waiting for me to do something they shouldn't have and it
looks fairly safe, and David Howells has some more header cleanups
he'd like me to pull, that seem like a good idea, but I'd like to get
this merge out of the way so -next dosen't get blocked."
Tons of conflicts mostly due to silly include line changes, but mostly
mindless. A few other small semantic conflicts too, noted from Dave's
pre-merged branch.
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits)
drm/nv98/crypt: fix fuc build with latest envyas
drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering
drm/nv41/vm: fix and enable use of "real" pciegart
drm/nv44/vm: fix and enable use of "real" pciegart
drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie
drm/nouveau: store supported dma mask in vmmgr
drm/nvc0/ibus: initial implementation of subdev
drm/nouveau/therm: add support for fan-control modes
drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules
drm/nouveau/therm: calculate the pwm divisor on nv50+
drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster
drm/nouveau/therm: move thermal-related functions to the therm subdev
drm/nouveau/bios: parse the pwm divisor from the perf table
drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices
drm/nouveau/therm: rework thermal table parsing
drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table
drm/nouveau: fix pm initialization order
drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it
drm/nouveau: log channel debug/error messages from client object rather than drm client
drm/nouveau: have drm debugging macros build on top of core macros
...
87 lines
2.7 KiB
C
87 lines
2.7 KiB
C
/**
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* \file drm_sarea.h
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* \brief SAREA definitions
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*
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* \author Michel Dänzer <michel@daenzer.net>
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*/
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/*
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* Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _DRM_SAREA_H_
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#define _DRM_SAREA_H_
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#include <drm/drm.h>
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/* SAREA area needs to be at least a page */
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#if defined(__alpha__)
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#define SAREA_MAX 0x2000U
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#elif defined(__mips__)
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#define SAREA_MAX 0x4000U
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#elif defined(__ia64__)
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#define SAREA_MAX 0x10000U /* 64kB */
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#else
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/* Intel 830M driver needs at least 8k SAREA */
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#define SAREA_MAX 0x2000U
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#endif
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/** Maximum number of drawables in the SAREA */
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#define SAREA_MAX_DRAWABLES 256
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#define SAREA_DRAWABLE_CLAIMED_ENTRY 0x80000000
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/** SAREA drawable */
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struct drm_sarea_drawable {
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unsigned int stamp;
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unsigned int flags;
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};
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/** SAREA frame */
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struct drm_sarea_frame {
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unsigned int x;
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unsigned int y;
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unsigned int width;
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unsigned int height;
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unsigned int fullscreen;
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};
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/** SAREA */
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struct drm_sarea {
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/** first thing is always the DRM locking structure */
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struct drm_hw_lock lock;
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/** \todo Use readers/writer lock for drm_sarea::drawable_lock */
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struct drm_hw_lock drawable_lock;
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struct drm_sarea_drawable drawableTable[SAREA_MAX_DRAWABLES]; /**< drawables */
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struct drm_sarea_frame frame; /**< frame */
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drm_context_t dummy_context;
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};
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#ifndef __KERNEL__
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typedef struct drm_sarea_drawable drm_sarea_drawable_t;
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typedef struct drm_sarea_frame drm_sarea_frame_t;
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typedef struct drm_sarea drm_sarea_t;
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#endif
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#endif /* _DRM_SAREA_H_ */
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